resistor

**resistor** is a passive component that opposes current and converts electrical energy to heat according to V = I × R. On-chip resistors set gain, bias, time constants, termination, sensing, and references, while discrete parts provide precision, RF matching, and power handling. **Resistance and geometry.** For a uniform conductor R = ρL/A, so material resistivity and geometry establish nominal value. Integrated layout is commonly expressed with sheet resistance in ohms per square: R = Rsheet(L/W), corrected for contacts, corners, current spreading, and process bias. Voltage coefficient, temperature coefficient, self-heating, and stress make resistance operating-point dependent. Johnson noise has density 4kTR, while excess 1/f noise depends on material and current. Parasitic capacitance and inductance make a physical resistor depart from an ideal element at high frequency. **Integrated resistor types.** Polysilicon offers useful sheet resistance, good ratio matching, and multiple silicide options. Diffusion and well resistors can achieve larger values but have junction capacitance, voltage dependence, and isolation constraints. Metal resistors are low value and useful for current sensing or interconnect models. Precision thin films such as NiCr or TaN add process steps but provide low temperature coefficient and strong matching. High-resistance poly or unsilicided films save area for bias networks but may increase noise and voltage coefficient. **Matching and layout.** Analog accuracy often depends on a ratio rather than absolute resistance. Common-centroid and interdigitated arrays cancel linear gradients; identical orientation, width, surroundings, contacts, and current density reduce systematic error. Dummies protect edge elements, Kelvin taps exclude contact and lead resistance, and segmented series-parallel construction improves ratio realization. Serpentine layouts save width but corner effects and thermal gradients must be modeled. Laser, fuse, or digital trimming corrects absolute process spread at test. **Discrete and system use.** Thick-film chip resistors are inexpensive general-purpose parts; thin-film parts offer precision and low noise; wire-wound elements handle power but carry inductance. Current shunts require low resistance, Kelvin sensing, and thermal calibration. RF terminations care about impedance through package and pad discontinuities. Pull networks, dividers, filters, gain setting, bias degeneration, and ESD ballasting each emphasize different combinations of value, voltage, noise, matching, bandwidth, and power. **Verification and reliability.** A production implementation begins with explicit terminal conditions, operating ranges, loading, accuracy, noise, latency, efficiency, area, cost, lifetime, and fault behavior. Schematic or architectural models establish feasibility; extracted, package, board, thermal, and control-loop models then reveal interactions hidden by ideal sources and loads. Verification spans process, voltage, temperature, mismatch, aging, startup, shutdown, overload, brownout, and recovery. Teams should define measurement bandwidth, observation point, stimulus, pass limit, guard band, and statistical confidence before simulation. Layout review covers current return, thermal gradients, matching, parasitic coupling, electromigration, voltage stress, latch-up, ESD paths, and test access. Correlation retains netlists, models, scripts, tool versions, raw results, lab conditions, calibration status, and explanations for outliers. This evidence turns a nominal design into a reproducible component that can be signed off across device, circuit, package, firmware, and system teams. Corner selection should follow sensitivity rather than blindly combining labels. Deterministic sweeps expose monotonic trends, targeted Monte Carlo analysis estimates distribution tails, and importance sampling can explore rare failures. Reviewers should distinguish model uncertainty from manufacturing variation and avoid claiming yield from too few samples. The interface contract must state what happens outside normal operation. Open and short terminals, reverse polarity, hot plug, disabled bias, floating control pins, clock loss, thermal shutdown, current limiting, and repeated fault cycling often determine field reliability even though they are absent from the nominal transfer function. Dynamic behavior deserves the same attention as steady state. Settling, overshoot, ringing, slew, recovery from saturation, mode transitions, and interaction with external poles can violate a system limit long before a DC endpoint does. Time-domain tests should include realistic edge rates and source impedance. Noise should be referred to the signal or supply point that matters to the application and integrated only over a stated bandwidth. Thermal, flicker, quantization, switching, reference, substrate, and electromagnetic contributions may combine differently across modes, so a single spot-noise number rarely completes the specification. Power and thermal claims should include quiescent, active, transient, and fault states. Average efficiency can hide localized current density or hot spots; electrothermal simulation and temperature-aware device models connect electrical stress to lifetime, drift, and protection thresholds. Physical design must preserve the assumptions behind the schematic. Symmetry, common-centroid placement, dummies, shielding, guard rings, Kelvin sensing, wide current paths, via arrays, controlled coupling, and quiet reference routing are selected according to the dominant error rather than applied as decoration. Production test strategy is part of design. Trim range, observability, loopback modes, built-in self-test, boundary conditions, test time, and instrument uncertainty determine which specifications can be guaranteed economically. Characterization across wafers and lots should feed model and guard-band updates. System telemetry can extend laboratory correlation into deployed products. Error counters, calibration codes, temperatures, supply monitors, fault flags, margin measurements, and performance events help distinguish random failures from systematic drift without exposing sensitive implementation details. A useful comparison normalizes alternatives at equal output requirement and environment. Peak headline values can be misleading when bandwidth, drive, voltage, area, cooling, external components, calibration, or reliability differs; the decision record should name the workload and weighting used. Cross-functional review should trace each requirement from physical mechanism through circuit behavior to application impact. That trace prevents duplicated margin, exposes assumptions that span ownership boundaries, and makes later process or package substitutions safer. Corner selection should follow sensitivity rather than blindly combining labels. Deterministic sweeps expose monotonic trends, targeted Monte Carlo analysis estimates distribution tails, and importance sampling can explore rare failures. Reviewers should distinguish model uncertainty from manufacturing variation and avoid claiming yield from too few samples. The interface contract must state what happens outside normal operation. Open and short terminals, reverse polarity, hot plug, disabled bias, floating control pins, clock loss, thermal shutdown, current limiting, and repeated fault cycling often determine field reliability even though they are absent from the nominal transfer function. Dynamic behavior deserves the same attention as steady state. Settling, overshoot, ringing, slew, recovery from saturation, mode transitions, and interaction with external poles can violate a system limit long before a DC endpoint does. Time-domain tests should include realistic edge rates and source impedance. | Type | Typical sheet-resistance class | Matching / TCR | Parasitic behavior | Best use | |---|---|---|---|---| | Metal | Very low | Moderate / positive TCR | Low C, layout inductance | Shunts and small values | | Silicided poly | Low to moderate | Good ratios | Moderate substrate capacitance | Compact analog networks | | Unsilicided or high-R poly | Moderate to high | Good with proper layout | More C per realized value | Bias and feedback | | Diffusion / well | Moderate to high | Process dependent | Junction C and voltage coefficient | Large noncritical values | | Thin film NiCr or TaN | Moderate | Excellent matching and low TCR | High Q when laid out well | Precision and RF | ```svg ``` **Connection to CFS platform.** Use the relevant CFS device, circuit, power, signal-integrity, thermal, and system simulators with linked glossary topics to turn these physical principles into quantified design choices.