Silicon Grown Junction 1954 Pulse Bond Base Wire

# Pulse-Bond Base Wire: Capacitor Discharge Alloying, Gallium Over-Doping, and Thermal Quench

With the gold-gallium base lead wire mechanically seated against the silicon matchstick in Step 30, forming a rugged, low-resistance electrical connection requires permanent metallurgical alloying. However, silicon cannot be soldered with conventional irons, nor can the entire transistor bar be placed back into a furnace without risking structural stress and package degradation. Instead, Texas Instruments utilized precision capacitor-discharge pulse bonding: a controlled electrical pulse discharges through the wire tip in microseconds, creating intense localized Joule heating that flashes a microscopic gold-silicon eutectic melt puddle ($T_{\text{eutectic}} = 363^\circ\text{C}$). Crucially, this bonding pulse does what mechanical positioning alone could never do: the wire's $0.5\%$ gallium content heavily overcompensates any adjacent $n$-type silicon it touches, creating a self-forgiving $p^{++}$ regrown halo that rescues minor placement errors while quenching so rapidly that solid-state junction diffusion remains completely frozen.

## 1. Capacitor Discharge Circuit Dynamics and Localized Eutectic Flash

Electrical discharge pulse bonding relies on intense, microsecond-scale thermal concentration:
1. Pulse Circuit Topology:
A precision oil-filled capacitor ($C \approx 0.1\text{ to }0.25\ \mu\text{F}$) is charged from a regulated DC power supply to $V_{\text{cap}} = 200\text{ to }300\ \text{V}$, storing $5\text{ to }15\ \text{mJ}$ of electrostatic energy. A mercury-wetted contact relay or triggered thyratron switch closes the circuit through the gold-gallium wire, down into the crystal contact point, and out through the Kovar collector lead.
2. Current Crowding and Eutectic Melting:
Because the contact footprint between the chisel wire tip and the silicon surface is only $\approx 10\text{ to }15\ \mu\text{m}$ across, the constriction resistance ($R_c \approx 50\ \Omega$) vastly exceeds the lead resistance ($< 0.5\ \Omega$). Over $95\%$ of the pulse energy dissipates right at the metal-semiconductor interface:
* Instantaneous peak power exceeds $P = I^2 R_c > 5\ \text{kW}$ for approximately $2\ \mu\text{s}$.
* The localized interface flashes to $\approx 500\text{ to }600^\circ\text{C}$, rapidly exceeding the Au-Si eutectic melting threshold ($363^\circ\text{C}$).
* A microscopic liquid puddle of Au-Si-Ga eutectic forms, dissolving a shallow hemisphere of silicon of radius $r_{\text{melt}} \approx 5\text{ to }7\ \mu\text{m}$.
3. Ultra-Fast Quench to Heat Sink:
The bulk silicon bar ($0.75 \times 0.75\ \text{mm}$) acts as a massive thermal sink with high thermal conductivity ($\kappa_{\text{Si}} \approx 1.5\ \text{W/(cm}\cdot\text{K)}$). Within $20\ \mu\text{s}$ after the discharge ceases, the molten pool freezes, mechanically welding the wire with pull strengths exceeding $15\ \text{grams}$.

## 2. Real Diagram: Capacitor Discharge Network and the Gallium-Regrown Halo

## 3. The Self-Forgiving Gallium Halo and Frozen Cumulative Thermal Budget

Capacitor discharge pulse bonding provides a profound technological safety valve against mechanical misalignment:
1. The Chemical Overcompensation Miracle:
If a base wire grazes slightly into the $n$-type collector during Step 30, conventional metallurgy would create an emitter-collector short or leaky Schottky barrier. But because the wire contains $0.5\%\text{ to }1.0\%$ gallium:
* During the discharge pulse, gallium dissolves homogeneously into the liquid Au-Si eutectic pool.
* As the puddle freezes epitaxially against the surrounding crystal, gallium is rejected into the regrown silicon lattice up to its solid-solubility limit ($N_A \approx 2 \times 10^{19}\ \text{cm}^{-3}$).
* The background donor concentration in the collector is only $N_D \approx 10^{15}\ \text{cm}^{-3}$. Gallium over-dopes the background donors by a staggering factor of $20,000 : 1$!
* Any portion of the melt that encroached onto the collector is instantaneously converted into degenerate $p^{++}$ silicon. The collector-base junction automatically migrates outward, bowing around the regrown bead. The base contact remains purely $p$-type and non-rectifying, rescuing what would have been a catastrophic scrap unit.
2. Closing the Cumulative Thermal Budget:
This pulse is the final thermal operation of the entire manufacturing process:
* Step 26 End Soldering: Sustained $400^\circ\text{C}$ for $15\ \text{seconds}$ across bar ends ($L_{\text{diff}} < 0.05\ \text{\AA}$).
* Step 31 Pulse Bonding: Reaches a higher localized peak temperature ($\approx 550^\circ\text{C}$), but for a duration of only $\tau \approx 2.5\ \mu\text{s}$.
* Because thermal diffusion length scales with $\sqrt{D \tau}$, the microsecond pulse duration confines the thermal budget strictly to the molten nugget: adjacent bulk junctions experience a diffusion migration of $L_{\text{diff}} < 0.01\ \text{nm}$—far less than a single atomic lattice constant.
3. Contact Electrical Verification:
The regrown degenerate $p^{++}$ interface reduces base series spreading resistance from hundreds of ohms down to $R_B \approx 20\text{ to }40\ \Omega$. This low base resistance is essential for high-frequency power gain ($f_{\text{max}}$) and eliminates emitter current crowding across the $25\ \mu\text{m}$ base stripe.

## Pulse-Bond Base Wire's Place in the Process Lineage

Pulse-bonding the base wire is step thirty-one of this project's 1954 silicon grown-junction transistor series — following the mechanical positioning of the gold-gallium wire, and preceding the critical three-terminal electrical verification. It represents the final thermal and contacting operation of the manufacturing sequence, permanently welding the base lead to the silicon crystal and completing the three-terminal $n\text{--}p\text{--}n$ device structure. Step thirty-two, test transistor action, applies operational DC biases to the newly completed transistor to measure forward current gain ($\alpha$), collector leakage, and frequency response.