sort yield
**Sort yield** is the **percentage of functional die identified during wafer-level electrical testing** — measuring how many die pass probe testing before wafer dicing, providing an early indicator of manufacturing quality and determining how many good die are available for packaging, directly impacting production economics and capacity planning.
**What Is Sort Yield?**
- **Definition**: Ratio of passing die to total die tested at wafer probe.
- **Measurement Point**: After wafer fabrication, before dicing and packaging.
- **Formula**: Sort Yield = (Good Die / Total Die Tested) × 100%.
- **Also Known As**: Probe yield, wafer sort yield, CP yield (Circuit Probe).
**Why Sort Yield Matters**
- **Early Detection**: Identifies fab defects before expensive packaging.
- **Capacity Planning**: Determines die availability for assembly.
- **Cost Impact**: Each percentage point affects millions in revenue.
- **Process Feedback**: Rapid signal for fab process issues.
- **Customer Commits**: Drives delivery forecasts and schedules.
- **Binning**: Sorts die into speed/power grade bins.
**Sort Yield Components**
**Functional Failures**:
- **Hard Defects**: Shorts, opens, missing features.
- **Parametric Failures**: Out-of-spec voltage, current, timing.
- **Logic Failures**: Incorrect functional behavior.
**Test Coverage**:
- **Structural Tests**: Scan, BIST, IDDQ for manufacturing defects.
- **Functional Tests**: At-speed operation verification.
- **Parametric Tests**: Voltage, current, timing measurements.
**Yield Loss Categories**:
- **Random Defects**: Particles, contamination (follows Poisson).
- **Systematic Defects**: Design marginality, process issues.
- **Edge Die**: Incomplete die at wafer periphery.
**Sort Yield Calculation**
**Basic Yield**:
```
Sort Yield = Good Die / Total Die Probed × 100%
Example:
Wafer: 1000 die tested
Good: 920 pass
Sort Yield = 920 / 1000 = 92%
```
**By Product Bin**:
```
Bin | Count | Description
-----|-------|-------------
Bin1 | 350 | Fast grade (premium)
Bin2 | 400 | Standard grade
Bin3 | 170 | Slow grade (budget)
Fail | 80 | Non-functional
-----|-------|-------------
Yield = 920/1000 = 92% (all passing bins)
```
**Yield Improvement Strategies**
- **Defect Density Reduction**: Cleaner fab environment, better process control.
- **Design for Manufacturability (DFM)**: Robust layouts tolerant of variation.
- **Inline Monitoring**: Catch excursions before they impact yield.
- **Test Program Optimization**: Reduce false failures from test margin.
- **Redundancy**: Memory repair, spare rows/columns.
**Tools & Equipment**
- **Probe Stations**: Applied Materials, Tokyo Electron, FormFactor.
- **Probe Cards**: Multi-site parallel testing for throughput.
- **Testers**: Advantest, Teradyne for functional/parametric tests.
- **Analytics**: Yield management systems (PDF Solutions, Synopsys).
Sort yield is **the critical metric connecting fab performance to business results** — it determines how many sellable die each wafer produces, directly impacting gross margin, factory output, and the ability to meet customer commitments on time.