Source Degeneration
# Source Degeneration: Local Feedback Inside a Transistor Stage
Source degeneration places an impedance in a MOS transistor’s source path so that signal current generates an opposing source-voltage change. A resistor is the usual low-frequency example: as drain current rises, the source rises, reducing the increase in gate-to-source voltage. This local negative feedback lowers effective transconductance and can improve linearity and reduce sensitivity to transistor parameters.
## 1. Follow the feedback through the circuit
*Simplified common-source stage. The input includes an appropriate DC gate bias; the body connection and bias network are omitted. The source resistor is not bypassed at the signal frequency.*
At low frequency, neglecting body effect and transistor output conductance, i d = gm(v in − i d RS). Therefore the gate-to-drain-current transconductance is Gm = gm / (1 + gm RS). With a drain resistor and negligible external loading, the voltage gain is approximately Av = −gm RD / (1 + gm RS). The negative sign represents inversion at the drain output.
For gm = 10 mS and RS = 200 ohms, gm RS = 2 and Gm is about 3.33 mS. With RD = 1 kilohm the approximate voltage gain is −3.33 V/V. These are small-signal estimates at the stated operating point; parasitics, body effect, output resistance and loading change the result.
## 2. See the gain–linearity tradeoff
*Calculated educational example, not PDK simulation or measurement. Both curves use the same ideal transistor and the same quiescent drain current I₀; the gate DC bias is adjusted to compensate for the resistor’s DC voltage drop. Enough drain headroom is assumed to maintain saturation throughout.*
The graph uses the ideal relation ID = β(VGS − VT)²/2. Define i = ID/I₀ and x = ΔVG/VOV₀, where VOV₀ is the transistor’s overdrive at the bias point. Without degeneration, i = (1 + x)². For the green curve, RS I₀/VOV₀ = 1, so x = √i − 1 + (i − 1) and gm RS = 2 at bias. These relations generate the plotted curves directly.
The green curve has lower slope and less curvature over the illustrated input range. The resistor absorbs part of the input-voltage change, so a given current swing requires more gate-voltage swing. For a practical linearity comparison, define the target output swing and distortion metric explicitly; a lower gain alone can reduce output distortion at fixed input amplitude.
## 3. Account for the costs
| Design concern | Effect of resistive degeneration | What to check |
|---|---|---|
| Gain | Effective transconductance is reduced | Available gain after loading |
| Headroom | DC current produces a source voltage drop | Saturation and output swing across corners |
| Noise | The resistor adds thermal noise | Full input-referred noise and noise figure |
| Variability | Gain can depend more on resistance than intrinsic gm | Resistor tolerance, mismatch and temperature coefficient |
| Frequency response | Source impedance changes with parasitics | Signal bandwidth and phase behavior |
As gm RS becomes large, the simple effective-transconductance expression approaches 1/RS. This reduces dependence on intrinsic gm but increases the importance of resistor accuracy. Local feedback does not remove device mismatch, resistor mismatch or operating-point variation.
## 4. Distinguish resistor, bypass and inductor
A capacitor across RS can preserve DC bias feedback while reducing the source impedance at higher signal frequencies. The amount of signal degeneration then depends on frequency; a fully bypassed resistor provides little of the resistive signal feedback discussed above.
Inductive source degeneration, common in RF low-noise amplifiers, is frequency dependent and can help create a useful real input impedance together with the transistor’s transconductance and capacitances. Its matching, loss and noise behavior requires an RF model. The resistor’s low-frequency formula cannot be reused as a broadband LNA design rule.
For a BJT, the corresponding technique is emitter degeneration. The feedback idea is similar, while finite base current and input impedance require different quantitative expressions.
## 5. Verify the implemented stage
Confirm DC bias and saturation margin, then evaluate gain, input range, noise and distortion with the actual device models and load. Use the same bias and a clearly stated input- or output-swing comparison when judging linearity. Sweep process, voltage and temperature; include resistor corners and mismatch where precision matters. Harmonic balance simulation can evaluate settled RF distortion, while transient analysis reveals clipping and settling behavior.
## References
- [Analog Devices: Single Transistor Amplifier Stages, section 9.5](https://wiki.analog.com/university/courses/electronics/text/chapter-9) — series feedback and emitter/source degeneration.
- [JKU Institute for Integrated Circuits: Analog Integrated Circuit Design](https://iic-jku.github.io/analog-circuit-design/aicd.html) — transistor models, degeneration and mismatch tradeoffs.