Super Power Rail

Super Power Rail (SPR) is TSMC's own brand name for its backside power delivery network, which TSMC has described targeting its A16 node, and the name identifies TSMC's specific implementation — not the generic backside-power-delivery concept that Intel and Samsung each implement under their own separate brand names. At a high level, how Super Power Rail is reaching a shipping product looks like this:

A few things are worth knowing about why Super Power Rail is TSMC's own device, not a synonym for backside power delivery itself:

Backside power delivery is the architecture; Super Power Rail is TSMC's specific implementation of it. As frontside copper wiring is asked to carry both signal routing and power distribution on the same side of the die, resistive voltage drop and routing congestion both worsen as the wiring shrinks — a problem every foundry pursuing sub-2nm-class logic has to solve. TSMC's answer is to introduce its own backside power grid starting with A16, after first shipping its nanosheet gate-all-around transistor on N2 with conventional frontside power. Intel's PowerVia, which debuted earlier alongside RibbonFET on Intel 20A, and Samsung's own backside power delivery network solve the identical interconnect problem with their own separately branded, separately qualified implementations.

TSMC sequenced Super Power Rail after its nanosheet gate, rather than bundling both changes into one node like Intel did. N2 introduced TSMC's gate-all-around nanosheet transistor with conventional frontside power, giving TSMC a node where only the transistor architecture changed; A16 then adds Super Power Rail on top of that already-qualified nanosheet gate, splitting what Intel took on as one combined architecture change across 20A into two separate qualification steps.

Super Power Rail's backside vias have to reach TSMC's own nanosheet transistor, not a generic gate shape. Because the backside rail connects directly into the transistor's source and drain, the via geometry TSMC qualifies for Super Power Rail is tied to the specific nanosheet device TSMC ships on A16 — the same dependency that ties Intel's PowerVia vias to RibbonFET's own geometry, which is why neither company's backside-power via design transfers directly to the other's transistor.

Read Super Power Rail through a *brand-and-company* lens rather than a *generic-BSPDN* lens: what Super Power Rail names is specifically TSMC's backside power delivery network, targeted for A16 after N2's nanosheet gate shipped with frontside power. Super Power Rail's relationship to Intel's PowerVia and Samsung's backside power delivery network is the same underlying fact as every other node name in this series: a backside-power brand name is that company's own platform, not a ruler the rest of the industry shares.