tungsten contact

**Tungsten CVD Contact Fill and Local Interconnect** is the **chemical vapor deposition process that fills contact holes and local interconnect trenches with tungsten metal** — serving as the standard contact plug material at the device-to-metal interface in CMOS process flows due to tungsten's excellent deposition conformality, compatibility with high-temperature post-processing, immunity to electromigration, and ability to fill high-aspect-ratio contact holes with virtually no seam or void through nucleation-layer-controlled CVD chemistry. **Why Tungsten for Contacts** - Refractory: Melting point 3422°C → survives all subsequent BEOL processing without degradation. - CVD conformality: WF₆ or W(CO)₆ chemistry → fills 10:1 AR contact holes completely. - Adhesion: TiN barrier + W CVD → excellent adhesion, no delamination. - EM resistance: W does not electromigrate at device-level current densities → reliable. - Limitation: High bulk resistivity (5.3 µΩ·cm) → at narrow M0 widths, alternative metals (Co, Ru) preferred. **Contact Stack** ``` W plug (CVD) TiN barrier (ALD, 5-10 nm) Ti adhesion layer + Ti/TiN stack (PVD) Ti/Si silicide contact (TiSi₂ or CoSi₂ at Si surface) Silicon substrate (doped S/D or gate) ``` **W CVD Chemistry** - **WF₆ reduction by H₂**: WF₆ + 3H₂ → W + 6HF. - Issue: WF₆ reacts with Si substrate directly → W "wormhole" defects if no nucleation barrier. - Nucleation layer: TiN or W₂N → blocks WF₆ from reaching Si → nucleates W growth. - **Nucleation step**: B₂H₆ reduces WF₆ → tungsten nucleation on TiN (conformal seed). - **Bulk fill**: H₂ + WF₆ → fast fill → 3–5 nm/s deposition rate. - **WF₆ vs W(CO)₆**: WF₆ has F → TiN adhesion layer required; W(CO)₆ is F-free → direct on oxide → used in some advanced processes. **Contact Aspect Ratio and Fill** - Contact AR at 7nm: Contact 20nm diameter, 100nm deep → AR = 5:1. - Seam formation: ALD-like conformal W → film from sides meets at center → thin seam (not a void). - Void formation: If nucleation poor → closure before bottom fills → buried void → high resistance. - WCVD bottom-up fill: SiH₄ nucleation + pulsed WF₆ → preferential bottom growth → fill from bottom up → fewer voids. **Tungsten Etch Back (WEB)** - After bulk W CVD: W overburden on wafer surface must be removed. - WEB: SF₆/O₂ plasma etch → removes W from field → leaves W only in contact holes. - Or CMP: Planarize W + TiN → preferred for multilevel contact (COAG, self-aligned contact). - Endpoint: Optical reflectometry → W has high reflectivity → endpoint when TiN/SiN appears. **Contact Resistance** - Contact resistance = ρ_W × L/A + interface resistance (W/TiN + TiN/Si). - Key parameters: - Contact size: Smaller area → higher resistance (inversely proportional). - Silicide contact: TiSi₂ or NiSi → low Schottky barrier → low contact resistance to Si. - TiN/W interface: Good ohmic due to similar work functions. - At 7nm node: Single contact resistance ~100–300 Ω → significant fraction of total transistor on-resistance. **Transition at Advanced Nodes** - M0 (local interconnect): Tungsten still used at 5nm for vias but increasing transition to Co or Ru. - Contact plug: Still predominantly W at 7nm/5nm; some Co contact plugs tested (lower bulk ρ). - 3nm and below: Ru contact plugs gaining adoption → lower resistivity at small dimension + no barrier needed. Tungsten CVD contact fill is **the metallization workhorse that has connected silicon transistors to copper interconnects in every CMOS chip since the 1990s** — by providing a conformal, defect-free fill of contact holes ranging from 100nm to 10nm in diameter with a metal that is immune to electromigration, thermally stable, and process-compatible with all subsequent backend steps, W CVD has made the critical transistor-to-metal connection reliably manufacturable across six generations of technology nodes, even as the industry now begins the transition to alternative metals at the narrowest features where tungsten's high bulk resistivity finally outweighs its process advantages.