Wafer Sorter
A wafer sorter moves whole wafers between carrier slots while preserving each wafer's identity and manufacturing history. It can reorder wafers, split a lot across carriers, combine approved material, or transfer wafers into a different compatible carrier. Its main job is controlled material handling, not changing the circuitry on the wafer.
Do not confuse this machine with wafer sort, the electrical test stage in which a prober and tester measure individual dies. Electrical testing can produce a die-level bin map; a wafer-handling sorter redistributes entire wafers. Moving one wafer into another FOUP does not separate its good dies from its bad dies.
The basic operation is a source-to-destination assignment. A recipe specifies which wafer should move from which carrier slot to which permitted destination. The machine combines load ports, a robot, wafer sensing, and often an aligner and ID reader. The number of ports and optional functions depend on the system. A physical transfer is complete only when the wafer has arrived and the relevant location records agree with the observed state.
The assignment must respect more than empty space. Carrier compatibility, wafer size, permitted contact surfaces, process status, and contamination rules all matter. A lot split is a change in grouping and genealogy, not just a robot move. Likewise, physically placing wafers together does not authorize merging incompatible process histories. The manufacturing execution system (MES) and equipment controls must enforce the site's approved material rules.
Map the carrier before trusting the slot list. Carrier mapping measures occupancy and, where supported, abnormal wafer placement. A wafer resting across two different slot heights is cross-slotted. Two wafers occupying the space intended for one are double-slotted. A protruding wafer presents another hazard. The sensing method and detectable conditions vary with the equipment and substrate, so a mapper must be qualified for the actual application.
Mapping is not identification. A sensor may confirm that a slot is occupied without knowing which wafer is there. Conversely, a correctly read ID does not prove that a wafer is seated safely. A sorter therefore needs separate checks for location, identity, and handling readiness. An unexpected map should not be overridden merely because a planned transfer list says the slot ought to be valid.
Identity must survive every handoff. A wafer scribe or machine-readable mark can be read optically when the sorter has the appropriate reader. A carrier barcode or RFID tag identifies the carrier; it does not automatically identify every wafer inside it. Reader placement, mark format, wafer orientation, and optical access must match the configured process. An unreadable or mismatched ID needs an explicit exception path rather than a guessed identity.
The useful tracking record binds a stable wafer ID to a changing location. During a move, that location may temporarily be the robot end effector or an aligner rather than a carrier slot. Recording only the initial and intended final slot leaves an ambiguity if the operation stops between them.
After an interruption, recovery should reconcile physical wafer presence with the last confirmed equipment and host records. Blindly replaying a transfer can attempt to pick an empty slot or place a wafer into an occupied one. Completion acknowledgements and exception handling are therefore part of the sorting function, not administrative details added afterward.
Clean handling does not mean contact-free or particle-free. Edge-grip and backside-support designs contact specified wafer regions. Filtered mini-environments, qualified motion, clean contact materials, and maintenance reduce contamination risk; they do not make particle generation impossible. Bowed, thinned, bonded, or film-coated wafers may require different handling qualifications. A standard-wafer recipe should not be assumed safe for every substrate that fits the carrier.
Throughput depends on the job. Reordering a few wafers is different from transferring every wafer while reading IDs and aligning each one. Port availability, transfer distance, reader retries, alignment time, scheduling, and host handshakes can all affect completion time. Dual arms or additional ports may reduce particular delays without eliminating the dominant bottleneck. A useful throughput specification states the actual transfer pattern, substrate, options enabled, and error-handling assumptions.
The key idea: a sorter changes where wafers are, while keeping who they are and what may happen to them consistent. The result is not simply a carrier with the right wafer count. It is the right wafers, in verified slots, under the correct manufacturing records.
Sources: Brooks Spartan Sorter and SMIF load-port documentation; RORZE ACE Sorter catalog; Critical Manufacturing sorter-scenario documentation. Diagrams are conceptual and do not specify equipment operating procedures.