Bspdn Interface Buried Rail with Frontside Contact Stack

# Backside Power Delivery: Step 9 — Interface the Buried Rail With the Frontside Contact Stack

## 1. A Rail Alone Delivers Nothing

A buried power rail sunk beneath the device, by itself, does not power a transistor -- it must
still be electrically joined to the source and drain contacts of the devices it serves,
through the ordinary frontside contact and via stack that was already part of the transistor
process before BSPDN existed.

## 2. The Frontside Half of the Connection

A short, conventional via rises from the buried rail up to the transistor's source or drain
contact, crossing the small vertical gap between the rail's trench and the bottom of the
active device layer. This via is a frontside structure, formed in the normal course of
transistor fabrication, well before the wafer is ever flipped for backside processing.

## 3. The Backside Half of the Connection

On the other face, the nano-TSV formed in Step 7 reaches the same buried rail from beneath,
after the flip and thinning sequence (Steps 5-6) has exposed the backside. The rail therefore
sits at the meeting point of two vias approaching from opposite directions -- one built early,
from the front; one built late, from the back.

## 4. Why This Two-Sided Interface Is the Load-Bearing Joint

Every resistance in the path from package to transistor matters for IR-droop, and this
buried-rail interface -- plus the contact resistance at the nano-TSV-to-rail junction
specifically -- is typically the single most resistive point in the entire backside power
path, more resistive than the nano-TSV body itself or the thick backside metal trunk. Low-
temperature silicide and barrier-metal development at exactly this junction remains an active
area of process development across the industry, because improving it has a disproportionate
effect on the overall droop reduction BSPDN delivers.

Two Vias Meeting at the Buried Rail From Opposite Faces a short frontside via above, a nano-TSV from beneath, joined at the rail FRONTSIDE VIA: RAIL TO SOURCE/DRAIN CONTACT, BUILT EARLY Transistor / Channel Layer Thinned Substrate / Via Field NANO-TSV: BACKSIDE METAL TO RAIL, BUILT AFTER THE FLIP Power Trunk Return Trunk Signal Power the rail sits at the meeting point of structures built at two different process stages contact resistance at this junction is usually the single largest term in the path
Backside Power Delivery: Step 9 — Interface the Buried Rail With the Frontside Contact Stack Interconnect decoupling, nano-TSV/buried power rails, and standard-cell scaling A RAIL ALONE DELIVERS NOTH... Thinned Si Substrate <500nm Active Fin / Sheet Buried Rail (Ru/W) BPR Embedded in STI A buried power rail sunk beneath the device, by itself, does not power a transistor -- it must still be electrically joined to the source and drain THE FRONTSIDE HALF OF THE ... Thinned Si Substrate <500nm Front M1-M4: Signal Wire Front M1-M4: Power Strap Direct Routing Conflict A short, conventional via rises from the buried rail up to the transistor's source or drain contact, crossing the small vertical gap between the rail's THE BACKSIDE HALF OF THE C... Thinned Si Substrate <500nm Frontside Signal M0-M6 Backside Power B0-B3 Backside Power Delivery On the other face, the nano- TSV formed in Step 7 reaches the same buried rail from beneath, after the flip and thinning sequence (Steps 5-6) has exposed the Key Semiconductor Engineering Takeaway BSPDN Step 9 uncouples power delivery from signal routing to resolve advanced node interconnect bottlenecks. Essential companion architecture deployed across 2nm and sub-2nm nodes by Intel, TSMC, and Samsung.

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