Bicmos Logic 1980s Characterize Bicmos Power Between CMOS and Bipolar

# BiCMOS Logic (Late 1980s): Step 17 — Characterize BiCMOS Power: Between CMOS and Bipolar

## 1. Static Power: Closer to CMOS, Not Identical to It

A BiCMOS chip's static power sits above a pure CMOS chip's near-zero floor from `cmos_logic_1980s_step06`, because every bipolar output stage conducts a small standing bias current even while idle — the base-emitter bias needed to keep the device ready to switch quickly contributes a continuous current draw that has no equivalent in a pure CMOS gate. Because bipolar stages are placed sparingly, per Steps 11 and 15, this added static term stays small relative to a chip that was entirely bipolar, but it is not zero, and it scales with how many bipolar output stages the design actually places.

## 2. Dynamic Power: Better Than Bipolar, Worse Than Pure CMOS at Light Load

Dynamic power follows a similar middle position: a BiCMOS output stage's switching power includes both the familiar $C_L V_{DD}^2 f$ term from `cmos_logic_1980s_step08` and an additional term from the current that flows through the bipolar stage itself during the transition, which is larger than an equivalent CMOS stage's switching current but smaller than a continuously conducting ECL gate's power draw. The overall characterization is precise rather than vague: BiCMOS power dissipation is bounded below by pure CMOS (which it cannot beat, having strictly more active devices doing the same job) and bounded above by pure bipolar (which it never approaches, having far fewer bipolar devices total), landing in a predictable middle band whose exact position depends directly on how many bipolar output stages a particular design actually uses.

## 3. Companion Diagram One: Quantitative View

Power Dissipation: Three Logic Families, One Axis total chip power, comparable design and process generation, three families pure CMOS — lowest, near-zero static floor pure bipolar/ECL — highest, continuous conduction everywhere BiCMOS lands here, position set by bipolar-stage count the floor BiCMOS cannot reach the ceiling BiCMOS never approaches BiCMOS power is not a fixed point, it is a position on this line more bipolar stages used, closer to the bipolar end; fewer, closer to CMOS

## 4. Companion Diagram Two: Structural View

Where BiCMOS's Power Terms Actually Come From static and dynamic power contributions, by source CMOS BULK LOGIC near-zero static, standard C_L V² f dynamic term BIPOLAR STANDING BIAS small continuous current, present even idle BIPOLAR SWITCHING CURRENT added dynamic term at every bipolar-stage transition the middle band is the sum of a CMOS floor plus a small bipolar add-on

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