Bicmos Logic 1980s Confront the Bipolar Density and Power Ceiling

# BiCMOS Logic (Late 1980s): Step 2 — Confront Bipolar's Density and Power Ceiling

## 1. What Bipolar Logic Still Does Better

The bipolar junction transistor the `bipolar_ecl_1960s` series built up from the DTL/RTL speed ceiling remains, in the late 1980s, the fastest practical digital switch available on a production process. Its current gain gives it a drive-current advantage CMOS cannot match at equal device size, and ECL's current-steered differential pair keeps its propagation delay essentially load-insensitive across a wide operating range — the property that made it the choice for mainframe backplanes and the fastest commercial logic families of the era.

## 2. The Two Costs That Price Bipolar Out of a Whole Chip

That speed is paid for twice. First, in static power: a bipolar gate conducts current continuously, not only while switching, so a chip built entirely from bipolar gates dissipates power whether or not it is doing useful work, and that power scales directly with gate count — exactly the term the `cmos_logic_1980s` series showed CMOS eliminates. Second, in density: a bipolar transistor's vertical structure — buried collector, base diffusion, emitter diffusion, isolation — occupies substantially more die area per device than a planar MOSFET of comparable process generation, and that area penalty compounds across a design with tens of thousands of gates. A chip that needs both bipolar's drive strength everywhere and CMOS's density everywhere cannot get both from either family alone; it needs both devices on the same die, used where each one's advantage actually pays for its cost.

## 3. Companion Diagram One: Quantitative View

Bipolar's Static Power Floor Never Drops to Zero static power per gate against gate count, two logic families CMOS static power — flat near zero bipolar static power — rises with gate count the floor bipolar cannot go below near-zero regardless of how many gates continuous conduction, every gate, all the time a chip of only bipolar gates pays this floor at every single gate this is the cost CMOS already eliminated, one family at a time

## 4. Companion Diagram Two: Structural View

Same Function, Two Devices, Very Different Footprint planar MOSFET against vertical bipolar transistor, same process generation CMOS MOSFET planar, gate over channel, smallest footprint BIPOLAR BJT buried collector + base + emitter stack, isolation ring AREA COST bipolar pays several MOSFET-widths of area per device density and drive strength have never lived in the same device — yet

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