Bipolar Ecl 1960s Characterize Noise Margin in Current Mode Logic
# Bipolar ECL Logic (1960s): Step 13 — Characterizing Noise Margin in Current-Mode Logic
How much electrical slack ECL's small logic swing actually leaves, and why it was enough. ECL's roughly 0.8 V logic swing (Step 5) is far smaller than TTL's roughly 3-4 V swing, which raises an obvious question: doesn't a smaller swing mean less noise immunity? This step works out ECL's actual noise margin budget and explains why the small swing did not translate into an unreliable logic family.
## 1. Defining Noise Margin for a Current Switch
Noise margin is the gap between the worst-case guaranteed output level a driving gate produces and the input level a receiving gate needs to make a correct decision, in both the high and low direction. For ECL, with V_BB compensation (Step 7) keeping the switching threshold tracking the logic levels across temperature and supply, 1960s MECL-family parts specified guaranteed noise margins on the order of 125-200 millivolts in each direction under worst-case temperature and supply conditions — a modest-looking number in absolute terms, but one that has to be read against the current switch's actual sensitivity, not against the swing size alone.
## 2. Real Diagram: ECL Noise-Margin Budget vs. Temperature
## 3. Why a Small Absolute Margin Was Still Reliable
The current switch's decision is set by the exponential current-transfer characteristic of the differential pair, which commits essentially all of the current to one side once the input-to-V_BB difference exceeds about four times the thermal voltage (roughly 100 mV at room temperature) — so the 125-200 mV specified margin already sits past the point of full current commitment, meaning noise within that margin does not partially corrupt the decision the way marginal noise can partially degrade a resistor-divider logic level. The V_BB temperature tracking from Step 7 keeps this margin from eroding further across the operating range, and board-level transmission-line discipline (Step 12) keeps reflection-induced noise from eating into the budget in the first place. The combination made ECL's margins tight by TTL standards but adequate in the carefully controlled board environments — short runs, matched impedance, controlled ground planes — that 1960s ECL system designers were already building for speed reasons.
## 4. Companion Diagram: Stage Sequence and Trend Summary
## Characterizing Noise Margin in Current-Mode Logic's Place in the Process Lineage
This is step 13 of 20 in the Bipolar ECL Logic (1960s) series, quantifying how ECL's small logic swing still delivered an adequate, temperature-stable noise margin given the current switch's sharp decision characteristic.