Double Diffused Silicon Mesa 1956 Mesa Etch Isolate Junction
# Mesa Etch: Cutting Through Two Junctions to Leave Each Device Standing Alone
## 1. Why the Etch Has to Go Deeper Than Either Junction, Not Just Between Them
This step exposes the wafer to a chemical etchant wherever the mask from Step 8 left silicon uncovered, removing material down past the base-collector junction depth so that each masked dot becomes a physically raised, electrically isolated mesa, separated from its neighbors by a trench of bare collector material or deeper. The etch is not merely cosmetic separation between devices sitting side by side; it has to cut through both the shallow emitter-base junction and the deeper base-collector junction in the exposed regions, because any continuous, undisturbed path of base or collector material between two mesas would electrically tie those two transistors together through the shared wafer they were both diffused into. The required etch depth is therefore set directly by the junction depths fixed in earlier steps, not chosen independently:
where $x_{\text{etch}}$ is the depth the etch actually reaches in the exposed regions and $x_{jC}$ is the base-collector junction depth from Steps 3 through 5. Etching to any depth less than $x_{jC}$ leaves a continuous base layer bridging every mesa on the wafer, defeating isolation entirely while still looking, from the surface, like a correctly patterned wafer.
## 2. Real Diagram: The Etchant's Path Through the Already-Verified Layer Stack
The chemical etchant used at this step attacks exposed silicon isotropically in this era's process, cutting down through the shallow emitter, through the graded base, and into the collector in every region Step 8's mask left uncovered, while the masked dots remain untouched and raised above the newly etched trench floor.
## 3. Why This Is the Step the 1954 Diffused-Base Project's Mesa-Isolation Vocabulary Comes From
The 1954 diffused-base germanium process this project has already documented used the same mesa-etch principle for the same reason — isolating adjacent devices on a shared wafer — so the chemistry and the geometric logic of "etch past the deepest junction" are not new to this process. What is different here is what is being protected on the way down: in the germanium process, the etch only had to clear a single base-collector junction depth set without any field-shaping intent behind it. Here, the etch has to clear a base-collector depth that was deliberately engineered in Steps 3 through 7 to support a specific drift field strength, and cutting the trench even slightly shallow does not just risk a connectivity short — it does so while leaving the very field-engineered base this entire process exists to produce sitting exposed at the trench wall, a condition the next several steps will have to specifically account for.
Step 9 does not add anything to the device; it is the step that makes "a device," in the singular, a meaningful concept on this wafer at all.