Double Diffused Silicon Mesa 1956 Die Separation Dicing

# Die Separation: Turning a Wafer Full of Finished Transistors Into Individually Handleable Parts

## 1. Why Electrical Isolation From Step 9 Did Not Make Physical Separation Unnecessary

Every mesa on the wafer has been electrically isolated from its neighbors since the etch in Step 9, but electrical isolation and physical separation are not the same thing — the entire wafer is still one continuous piece of silicon, and this step cuts it apart into individual dies, each one carrying exactly one complete transistor with its base, emitter, and collector contacts already in place. Dicing has to cut through the collector bulk between mesas without disturbing the delicate structure sitting on top of it — the same graded base, shallow emitter, and three metal contacts every one of the previous fourteen steps worked to build correctly. The cut lines are placed in the trenches the mesa etch already created, giving this step a natural, already-thinned path to follow:

$$t_{\text{cut}} = t_{\text{wafer}} - x_{\text{etch}}$$

where $t_{\text{cut}}$ is the remaining thickness the dicing tool actually has to cut through at the trench location, $t_{\text{wafer}}$ the full wafer thickness, and $x_{\text{etch}}$ the mesa etch depth from Step 9. Because the etch already removed material at exactly the locations this step needs to cut, dicing here has less material to get through than it would on an unetched wafer — a direct, if secondary, benefit of the isolation work done nine steps earlier.

The Etch Trench From Step 9 Becomes This Step's Cut Line electrical isolation and physical separation are different problems, solved nine steps apart die 1, complete transistor die 2, complete transistor etch trench, already thinned here since Step 9 dicing cut, straight down this already-shallow path tᴲᵴᵍ = tᵠᴦᴰᴲᴸ − xᴲᵍᴲᵇ — less material to cut through, exactly where this step needs to cut

## 2. Real Diagram: Separation Does Not Require Touching Any of the Finished Junction Structure

The dicing tool follows the trench grid, never crossing into the area directly beneath a mesa, meaning the entire vertical junction stack — collector, graded base, emitter, and all three contacts — passes through this step completely undisturbed, carried along as part of each individual die rather than being worked on directly.

A Grid of Cuts That Avoids Every Finished Device Entirely top view: the dicing pattern only ever touches trench area dicing lines, trench-only every mesa passes through this step as an undisturbed bystander to the cut happening around it

## 3. Why This Step's Yield Risk Differs From the 1954 Diffused-Base Process's Equivalent Step

The 1954 diffused-base germanium process this project has already documented also diced finished wafers into individual dies, so separating a wafer into discrete parts is not new to this lineage. Germanium is mechanically more brittle than silicon under the stresses dicing introduces, which made that earlier process's separation step a more delicate operation in some respects. Silicon tolerates the mechanical stress of dicing somewhat better, but this process's own risk shows up differently: because the mesa etch already thinned the trench area, a dicing cut that drifts even slightly off the trench centerline risks clipping the edge of an adjacent mesa rather than passing cleanly between two of them, damaging a finished junction stack that fourteen prior steps worked to build — a failure mode made possible specifically by how narrow the margin between mesas was kept in Step 8's mask design.

Step 15 does not add or change anything about any individual transistor's structure; it is the step where "a wafer of transistors" finally becomes "transistors," plural and separate.

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