What Is an Etch 3D NAND Pull Back Trim Filmstack

An etch 3D NAND pull back trim filmstack (etch 3D NAND pull back trim etch filmstack) refers to the specialized multi-layer lithographic mask-and-dielectric laminate structure utilized during the lateral pull-back trimming sequences of 3D NAND manufacturing. In high-density memory architectures (232-layer, 280-layer, and $>300$-layer superlattices), "pull-back trim" describes two indispensable process modules: (1) *staircase pad formation*, where a thick ($4\text{–}6\text{ }\mu\text{m}$) organic mask undergoes cyclical isotropic oxygen/nitrogen plasma pull-back ($\Delta W \approx 150\text{–}250\text{ nm}$) followed by anisotropic fluorocarbon step etching to reveal individual word line landing terraces; and (2) *sacrificial layer lateral pull-back (recess) etching*, where sacrificial silicon nitride ($Si_3N_4$) layers inside the alternating oxide-nitride ($SiO_2/Si_3N_4$) filmstack are laterally pulled back from slit trenches (source contact trenches) via isotropic wet phosphoric acid ($H_3PO_4$) or vapor-phase atomic layer chemical dry etching ($NF_3/NH_3/HF$) to form horizontal micro-cavities for word line metal gate replacement. Fabricating and trimming this filmstack requires strict control over lateral pull-back uniformity ($3\sigma < 1.5\text{ nm}$ across $300\text{ mm}$ wafers), mask facet retention, zero silicon dioxide thinning, and preservation of the vertical channel memory hole structure. At a high level, the architectural anatomy of a 3D NAND pull-back trim etch filmstack and its cyclic recession process looks like this:

Periodic ONON superlattice
128-300+ alternating pairs of SiO2 (28nm) and Si3N4 (24nm)
Pull-back mask laminate deposition
Thick planarizing SOC/PR (4-6μm) + Si-ARC or dielectric hardmask
Cyclic lateral pull-back trim & recess etchIsotropic lateral mask recession, directional bilayer transfer, and sacrificial nitride pull-back
Lateral mask pull-back trim
O2 / N2 / CO2 isotropic plasma uniformly recedes mask by ΔW = 200nm
Vertical bilayer step open
CF4 / CHF3 anisotropic etch transfers exposed step down ΔZ = 50nm
Mask facet & footing passivation
In-situ polymer conditioning prevents rounded edge beveling
Sacrificial Si3N4 lateral pull-back
Hot H3PO4 or dry NF3/NH3 pulls back nitride to form WL gate cavities
↻ multi-cycle precision recession
Uniform horizontal terraces
Exposes word line landing pads across 8μm vertical elevation
Zero cavity distortion & collapse
Preserves SiO2 cantilever stability for tungsten gate fill

A few principles are essential for understanding how 3D NAND pull-back trim etch filmstacks are constructed, how isotropic chemical recession is governed, and why lateral etch uniformity is vital for word line contact alignment:

Filmstack structural hierarchy and functional layers. An advanced 3D NAND pull-back trim etch filmstack consists of five functional strata:
1. *Planarizing Organic Pull-Back Mask:* $4.0\text{ to }6.0\text{ }\mu\text{m}$ of dense, highly cross-linked spin-on carbon (SOC) or thick i-line/KrF photoresist. The polymer must maintain high resistance against ion bombardment while undergoing highly controllable isotropic lateral erosion ($\approx 150\text{–}250\text{ nm/cycle}$) without top-surface faceting.
2. *Dielectric Capping & Antireflective Layer:* $30\text{ to }60\text{ nm}$ of silicon oxynitride ($SiON$) or silicon dioxide ($SiO_2$) providing an optical planarization base and an initial hardmask pattern.
3. *Alternating ONON Memory Bilayer Superlattice:* $6\text{ to }10\text{ }\mu\text{m}$ total depth of $128\text{ to }300+$ repeating bilayers:
- *Dielectric Cantilever ($SiO_2$, $25\text{–}32\text{ nm}$):* Must remain structurally rigid and chemically immune to the lateral pull-back chemistries.
- *Sacrificial Nitride Matrix ($Si_3N_4$, $20\text{–}26\text{ nm}$):* The designated pull-back material, selectively stripped or recessed without attacking the oxide cantilever.
4. *Slit Trench (Word Line Cut) Sidewall Interface:* Vertical slit trenches etched through the superlattice to expose the edges of all 200+ nitride layers to the lateral pull-back etchants.
5. *Underlying CMOS under Array (CuA) Substrate:* Peripheral driving circuits and interconnect metallization protected beneath the array.

3D NAND Pull-Back Trim Etch Filmstack Lateral mask recession, cyclic step trimming, and sacrificial Si3N4 gate cavity pull-back Pull-Back Trim Architecture SOC Mask ΔW Trim Step-N Step-N-1 Cavity Si3N4 Peripheral CMOS Substrate Protected CuA Circuits Pull-Back Kinetics & Lateral Recession Chemistry 1. Lateral Mask Pull-Back (O2 / CO2 / N2 Plasma): Isotropic oxygen ash recedes organic mask laterally: ΔW = 150-250nm per cycle N2 / CO2 additives suppress top resist erosion, preserving 90° sidewall facet angle 2. Anisotropic Step Down-Etch (CF4 / CHF3 / O2): Transfers exposed step down through 1-2 pairs of SiO2 / Si3N4 (ΔZ = 50nm) Selectivity > 5:1 to mask; eliminates step footing and micro-loading distortions 3. Sacrificial Si3N4 Lateral Pull-Back (Wet H3PO4 or Dry NF3/NH3): Selectively removes nitride laterally from slit trenches with >100:1 selectivity to SiO2 Forms horizontal micro-cavities; leaves pristine SiO2 cantilevers for W metal gate fill Trim Uniformity 3σ < 1.5nm | Selectivity Si3N4:SiO2 > 100:1 | Zero Oxide Bending Isotropic Mask Pull-Back ΔW = 150-250nm precision >100:1 Nitride:Oxide Pull-Back H3PO4 & dry vapor selectivity Cantilever Stability Zero stiction or collapse 3D NAND pull-back trim filmstacks govern both mask lateral trim for staircase pads and sacrificial Si3N4 gate pull-back extreme chemical selectivity (>100:1) and sub-1.5nm trim uniformity preserve oxide cantilevers for tungsten metallization

Chemical kinetics and lateral pull-back selectivity mechanisms. Precision pull-back trimming demands strict control over chemical reactions along two orthogonal dimensions:
- *Organic Mask Lateral Trim Kinetics:* In the staircase module, lateral mask pull-back requires an isotropic chemical plasma with minimal directional sputtering. An $O_2/CO_2/N_2$ plasma produces abundant oxygen radicals ($O^\bullet$) that spontaneously react with the carbon polymer matrix to form volatile $CO_2$ and $CO$ gases. The addition of nitrogen ($N_2$) forms a nitrided polymer layer on the top surface of the resist, reducing vertical erosion and maintaining a sharp, near-vertical facet angle ($>88^\circ$). This preserves step edge definition throughout $8\text{ to }16$ consecutive trim-and-etch loops per lithography reticle pass.
- *Sacrificial Nitride Lateral Pull-Back / Gate Cavity Recession:* In the word-line replacement module, sacrificial silicon nitride ($Si_3N_4$) layers must be pulled back horizontally from vertical slit trenches across a distance of several micrometers. This is achieved via:
1. *Hot Phosphoric Acid ($H_3PO_4$ at $155^\circ\text{–}165^\circ\text{C}$):* Hydronium ions selectively dissolve silicon nitride according to:

$$3Si_3N_4 + 27H_2O + 4H_3PO_4 \rightarrow 4(NH_4)_3PO_4 + 9SiO_2 \cdot H_2O$$

The process provides near-infinite selectivity ($>100:1$) over silicon dioxide ($SiO_2$).
2. *Vapor-Phase Chemical Dry Etching ($NF_3/NH_3$ / Remote Plasma):* In advanced nodes where wet surface tension can cause nanoscale pattern collapse (stiction of thin $25\text{ nm}$ oxide cantilevers), anhydrous vapor-phase chemical etching is deployed. $NF_3/NH_3$ creates solid ammonium fluorosilicate $(NH_4)_2SiF_6$ salts specifically on $Si_3N_4$ surfaces, which subsequently sublimate into gas at elevated wafer bake temperatures ($>120^\circ\text{C}$), leaving the $SiO_2$ isolation cantilevers pristine and ready for atomic layer deposition of aluminum oxide ($Al_2O_3$), titanium nitride ($TiN$), and tungsten ($W$) metal gates.

Read a 3D NAND pull-back trim etch filmstack through a *lateral-architectural-recession* lens: a high-precision multi-material system where isotropic radical chemistry systematically sculpts masks and dissolves sacrificial nanolayers horizontally, creating both the descending word-line terraces and the internal metal-gate cavities that define multi-terabit memory arrays.

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