half-pitch

Half-pitch is a fundamental dimensional metric in semiconductor lithography that represents half the distance of the smallest repeating pattern pitch (the sum of one line width and one space width) that can be reliably printed by a given lithographic process. It serves as the de facto industry standard for characterizing the resolution capability of a lithography technology generation and has been used by the International Technology Roadmap for Semiconductors (ITRS) and its successor IRDS to define technology nodes. For example, the "45 nm node" historically corresponded to a half-pitch of approximately 45 nm for the tightest metal or polysilicon pitch on the chip. Half-pitch is preferred over minimum feature size as a resolution metric because it relates directly to the spatial frequency content of the pattern and the optical resolution limit defined by the Rayleigh criterion: minimum half-pitch ≈ k1 × λ / NA, where k1 is the process factor, λ is the exposure wavelength, and NA is the numerical aperture. The theoretical minimum k1 for single-exposure lithography is 0.25, corresponding to the diffraction limit where only the 0th and ±1st diffraction orders pass through the objective lens. In practice, production k1 values for aggressive pitches range from 0.28 to 0.35 with advanced resolution enhancement techniques (RET) including off-axis illumination, phase-shift masks, and optical proximity correction. For 193 nm immersion lithography with NA = 1.35, the minimum achievable single-exposure half-pitch is approximately 36-40 nm. Achieving smaller half-pitches requires multiple patterning techniques (LELE, SADP, SAQP) or shorter wavelength lithography such as EUV at 13.5 nm, which can achieve half-pitches below 20 nm in single exposure. The ongoing reduction of half-pitch across technology generations drives most of the density improvements in Moore's Law scaling.