pitch

Pitch is the center-to-center distance between repeating features, a fundamental metric for lithography capability and density. **Definition**: Pitch = line width + space width. For equal line/space, pitch = 2 x CD. **Minimum pitch**: Determined by lithography resolution. Each technology node targets smaller pitch. **Half-pitch**: Often used to describe technology. 7nm node refers to ~28nm metal pitch (half pitch ~14nm). **Density relationship**: Smaller pitch = more features per area = higher transistor density. **Lithography limit**: Resolution limits around wavelength/(2*NA). For 193i, ~80nm pitch. **Multi-patterning**: SADP doubles density (halves pitch), SAQP quadruples. **EUV pitch**: 13.5nm wavelength enables tighter pitch single exposure. **Contacted pitch**: For SRAM cells, minimum pitch where contacts can still be placed. **Metal pitch**: Distance between metal lines. Resistance and capacitance scale with pitch. **Dimensions**: Leading edge logic at 3nm node approaching 28nm metal pitch, 48nm gate pitch. **Roadmap**: Industry roadmap defines pitch scaling goals.