metal gate work function
**Metal Gate Work Function** is the **energy required to remove an electron from the metal gate to vacuum** — directly controlling transistor threshold voltage and enabling independent NMOS/PMOS Vt tuning in high-k metal gate (HKMG) processes.
**Why Work Function Matters**
- Threshold voltage: $V_T = V_{FB} + 2\phi_F + \frac{Q_{dep}}{C_{ox}}$
- Flat-band voltage $V_{FB}$ depends on gate work function $\phi_m$: $V_{FB} = \phi_m - \phi_s$
- Higher gate work function → more positive Vt (PMOS direction).
- Tuning $\phi_m$ is the primary Vt adjustment mechanism in HKMG.
**Fermi Level Pinning Problem**
- Early HfO2 gates used polysilicon — poly Si pins Fermi level near Si midgap.
- Result: NMOS Vt too high, PMOS Vt too low — unusable transistors.
- Solution: Replace poly with metal gate (first at Intel 45nm, 2007).
**Work Function Engineering**
- **NMOS target**: Low work function ~4.1–4.2 eV (near Si conduction band).
- Materials: TiN (thin), TaN, TiC, HfN.
- **PMOS target**: High work function ~5.0–5.2 eV (near Si valence band).
- Materials: TiN (thick), MoN, WN, Ru.
- Process: Different metal thicknesses or capping layers for NMOS vs. PMOS.
**Multi-Vt Implementation**
- High-Vt (HVT), Standard-Vt (SVT), Low-Vt (LVT), Ultra-Low-Vt (uLVT) cells.
- Achieved by varying metal gate work function cap layer thickness.
- HVT: Lower leakage, higher speed threshold — used in low-power circuits.
- uLVT: Highest speed, highest leakage — used in critical paths.
**Measurement**
- C-V measurement on MOS capacitors extracts flat-band voltage → work function.
- Controlled to ±5 mV across wafer for tight Vt matching.
Metal gate work function engineering is **the cornerstone of transistor Vt control in sub-28nm CMOS** — enabling multi-Vt optimization for power-performance tradeoffs in advanced SoC designs.