recommended design rules

**Recommended design rules** are **optional guidelines** that go beyond the mandatory minimum design rules — suggesting layout practices that improve yield, reliability, and manufacturability without being strictly required for the design to pass DRC. **Recommended vs. Minimum Rules** - **Minimum Rules (Mandatory)**: The absolute minimum dimensions and spacings that the design must satisfy. Violating these causes DRC errors and blocks tapeout. - **Recommended Rules (Advisory)**: Suggested values that are larger/more conservative than minimums. Meeting them improves manufacturing outcomes but is not required. **Examples of Recommended Rules** - **Wider Metal**: Minimum wire width may be 40 nm, but recommended width is 60 nm for better EM lifetime and lower resistance. - **Larger Via Enclosure**: Minimum metal overlap around a via may be 10 nm, but recommended is 20 nm for better via yield. - **Wider Spacing**: Minimum metal spacing may be 40 nm, but recommended spacing is 60 nm for reduced crosstalk and bridging risk. - **Larger Contacts**: Minimum contact size plus recommended over-sizing for improved contact resistance uniformity. - **More Generous End-of-Line**: Minimum line extension past a via may be 15 nm, but recommended is 25 nm for better reliability. **Why Follow Recommended Rules?** - **Yield Improvement**: Every recommended rule that is followed reduces the probability of a manufacturing defect at that location. Across millions of features, the cumulative yield impact is significant. - **Reliability**: Wider metals have better electromigration lifetime. Larger via enclosures reduce stress voiding risk. - **Process Margin**: Recommended rules provide margin against process variation — if a process drifts slightly, features at recommended dimensions still pass while minimum-dimension features may fail. - **Guard-Band**: Accounts for measurement uncertainty and process non-uniformity that the minimum rules may not fully capture. **When to Use Minimum vs. Recommended** - **Area-Critical Blocks** (SRAM, register files): Use minimum rules to achieve maximum density. - **Standard Logic**: Use recommended rules where routing allows — the area penalty is small but the yield benefit is real. - **Analog/Mixed-Signal**: Use recommended (or even more conservative custom) rules — analog circuits are more sensitive to parasitic variation. - **Power Grid**: Use recommended or wider rules — power lines carry continuous current and must be EM-robust. - **Critical Nets**: Clock, reset, and high-speed signals benefit from recommended spacing for noise immunity. **Design Flow Integration** - Most EDA tools support recommended rules as a **secondary rule deck** — the router can be configured to use recommended rules by default and fall back to minimum rules only where congestion requires it. - **Scoring**: Some flows assign a "DFM score" based on how many features meet recommended vs. minimum rules. Recommended design rules represent the **engineering sweet spot** between density and manufacturability — following them systematically is one of the easiest ways to improve chip yield.