Sidewall Spacer

A sidewall spacer is a small insulating structure formed along the vertical edges of a transistor's gate, used as a self-aligned mask that offsets subsequent processing steps a controlled distance from the gate edge. It is one of the quiet workhorses of modern transistor fabrication, enabling self-aligned structures like the lightly doped drain and the self-aligned silicide without requiring additional critical alignment steps. The spacer's value lies in its geometry: because it is formed on the gate's own sidewalls, it automatically positions features relative to the gate, turning the gate itself into the reference for later steps.

The spacer is formed by depositing an insulating layer over the whole wafer and then etching it directionally, which leaves material only against the vertical gate edges. A conformal film is deposited so it coats the flat surfaces and the sides of the gate alike, and then an anisotropic etch removes material preferentially from the horizontal surfaces while leaving it on the steep vertical sidewalls, because the etch cuts downward faster than sideways. What remains is a strip of insulator hugging each side of the gate — the spacer. This deposit-then-directional-etch sequence is an elegant way to create a feature that is automatically positioned by the gate's own geometry.

The spacer's defining usefulness is self-alignment: it offsets later steps a controlled distance from the gate without needing a separately aligned mask. Normally positioning a feature precisely relative to the gate would require an additional lithography step aligned to the gate, introducing cost and alignment error. The spacer sidesteps this by being physically attached to the gate, so whatever it masks is automatically positioned relative to the gate edge by the spacer's width. This turns a potential alignment problem into a geometric certainty, which is why spacers are so valuable in processes where features must sit at precise offsets from the gate.

The two most important uses of sidewall spacers are forming the lightly doped drain and enabling self-aligned silicide, both of which depend on the spacer's controlled offset. In the lightly doped drain, a light implant is done first, spacers are formed, then a heavy implant is performed; the spacers hold the heavy doping away from the channel edge, leaving the lightly doped region in between. In self-aligned silicide, spacers separate the gate from the source and drain regions so that the silicide formed on each does not bridge them. Both techniques rely on the spacer to create a precise, self-aligned separation, making the spacer indispensable to scaled transistors.

The sidewall spacer exemplifies a powerful idea in fabrication: use the geometry of existing structures to position new ones automatically, avoiding extra alignment. Rather than adding a masking step to place a feature relative to the gate, the process grows a feature from the gate itself and lets it do the positioning. This self-aligned philosophy reduces cost, removes a source of error, and is a recurring theme in how the industry builds precise small structures. The spacer is one of its most elegant and widely used embodiments, quietly enabling several of the key structures of modern transistors.

Read the sidewall spacer as a self-positioning ruler grown on the gate: formed by depositing insulator and etching it directionally so it clings to the gate's vertical edges, it offsets later implants and silicide a precise distance from the gate with no extra alignment, quietly enabling the lightly doped drain and self-aligned silicide of modern transistors.