silicide formation

**Silicide Formation** is a **FEOL process where a metal reacts with silicon at elevated temperature to form a metal-silicon compound** — creating a low-resistivity contact layer on the surface of the source, drain, and gate that reduces sheet resistance and contact resistance. **How Are Silicides Formed?** - **Process**: 1. Deposit metal (Ni, Co, Ti) by PVD sputtering. 2. First Anneal (RTA): Metal reacts with exposed Si to form silicide. 3. Selective Etch: Remove unreacted metal from dielectric surfaces (wet strip). 4. Second Anneal: Convert to the low-resistivity phase (e.g., NiSi, CoSi₂). - **Self-Aligned**: Silicide forms only where metal contacts silicon. On SiO₂ or SiN, no reaction occurs -> selective removal leaves silicide only on S/D/Gate. **Why It Matters** - **Sheet Resistance**: Silicide reduces S/D sheet resistance from ~5000 $Omega$/sq (doped Si) to ~5-10 $Omega$/sq. - **Contact**: Provides a smooth metal-semiconductor interface for low-resistance ohmic contacts. - **Universal**: Every CMOS process from the VLSI era onward uses silicide contacts. **Silicide Formation** is **metalizing the silicon surface** — creating a conductive skin on every transistor contact point for minimal resistance.