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P-N Electrostatics, Band Bending & Recombination Dynamics

Junction University

The foundational atomistic building block of all semiconductor devices: thermal equilibrium, Poisson band bending, built-in potential, Shockley ideal diode equation, junction capacitance, avalanche breakdown, and heterojunction bandgap engineering.

7 Levels
Elementary to Fellow
21 Modules
Rigorous Curriculum
7 Sim Labs
Real-Time Engines
7 Diplomas
Industry Fellow Laureate
Academic Level 1 • Ages 6–10
The One-Way Electrical Valve
Discover how bringing p-type and n-type silicon together creates an invisible electrical gate that only lets current flow one way.
Module 1.1

Atoms with Extra and Missing Electrons

Pure silicon crystal is an electrical insulator at cold temperatures. To make it conduct, scientists add tiny pinches of other elements—a process called doping.

Adding phosphorus adds extra mobile electrons (n-type for negative). Adding boron creates missing electrons called 'holes' (p-type for positive). Holes act like positive bubbles of charge.

  • N-Type (Negative): Silicon crystal with extra free-swimming conduction electrons.
  • P-Type (Positive): Silicon crystal with empty atomic spots (holes) that attract electrons.
$$Thermal Equilibrium Neutrality: $n_0 p_0 = n_i^2 \approx 1.0 \times 10^{20}\ \text{cm}^{-6} \text{ (in Silicon at 300K)}$$$
Module 1.2

When P Meets N: The Depletion Wall

When a p-type block and an n-type block are merged in the same crystal, electrons at the boundary rush across to fill the holes, leaving behind charged atomic ions.

This creates an invisible middle zone completely emptied of mobile charges: the Depletion Region. It acts like an electric fence preventing any further traffic.

  • Fixed Atomic Ions: Positive donor ions on the n-side; negative acceptor ions on the p-side.
  • Built-in Electric Fence: Creates a natural internal battery voltage of about 0.7 Volts in silicon.
$$Built-in Potential in Silicon: $V_{bi} \approx 0.7\ \text{V}$$$
Module 1.3

Forward and Reverse Bias: One-Way Traffic

If you connect an external battery plus-to-P and minus-to-N (Forward Bias), you overcome the built-in fence and a roaring river of electrical current surges through.

If you reverse the battery (Reverse Bias), you pull carriers further away, widening the fence so virtually zero current can cross. It is the world's most perfect one-way valve!

  • Forward Bias: Wall collapses; current flows easily with negligible resistance.
  • Reverse Bias: Wall widens; only a tiny whisper of leakage current passes.
$$One-Way Diode Action: $I(V > 0.7\text{V}) \gg 0 \quad\text{and}\quad I(V < 0) \approx 0$$$
⚡ Junction Lab 1
Interactive P-N Valve Flow Simulator
Dial forward and reverse bias voltage to watch the depletion wall shrink or expand and observe the resulting current flow.
Bias Voltage $V$ (Volts)0.6 V
Junction Temperature (°C)25 °C
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Diode Current
14.2 mA
Depletion Wall
0.18 µm
Junction State
Forward Conduction
🎓 Level 1 Assessment
Knowledge Check: P-N Junction Fundamentals
1. What creates the 'depletion region' at the metallurgical interface of a P-N junction?
2. Approximately what built-in threshold voltage must be overcome to turn on a standard silicon P-N diode in forward bias?
3. What happens to the depletion region thickness when you apply reverse bias (positive battery terminal to N, negative to P)?

Level 1 Completed: Junior Junction Physics Apprentice

Conferred for mastering atomic dopants, depletion space-charge formation, and forward/reverse bias one-way conduction.

Academic Level 2 • Ages 11–13
Diffusion, Drift & Energy Band Bending
Explore the equilibrium tug-of-war between carrier diffusion and electric drift, Fermi level alignment, and energy band curvature.
Module 2.1

The Dynamic Balance: Diffusion vs Drift

In thermal equilibrium with no external wires connected, zero net current flows through a P-N junction. But microscopic current is roaring in both directions!

Concentration gradients drive huge diffusion currents: electrons diffuse from N to P, holes from P to N. Meanwhile, the internal electric field pulls them backward via drift. In equilibrium, diffusion and drift exactly cancel out.

  • Fick's Diffusion: Driven by carrier concentration gradients ($dn/dx$ and $dp/dx$).
  • Ohmic Drift: Driven by the internal electrostatic field: $J_{drift} = q(n\mu_n + p\mu_p)\mathcal{E}$.
$$Equilibrium Current Balance: $J_n = q D_n \frac{dn}{dx} + q \mu_n n \mathcal{E} = 0$$$
Module 2.2

Fermi Levels & Energy Band Bending

The Fermi level ($E_F$) represents the chemical potential of electrons. In any system in thermodynamic equilibrium, $E_F$ must be a flat, horizontal line throughout the entire device.

Because $E_F$ is close to the conduction band $E_c$ in n-type and close to the valence band $E_v$ in p-type, the bands must physically bend across the depletion region by an energy equal to $q V_{bi}$.

  • Flat Fermi Level: $ rac{dE_F}{dx} = 0$ in equilibrium.
  • Band Bending Barrier: Height of the potential hill is $q V_{bi} = (E_c)_{ ext{p-side}} - (E_c)_{ ext{n-side}}$.
$$Built-in Potential Formula: $V_{bi} = \frac{k_B T}{q} \ln\left(\frac{N_A N_D}{n_i^2}\right)$$$
Module 2.3

Majority vs Minority Carrier Dynamics

In the n-region, electrons are majority carriers ($n pprox N_D$), while holes are rare minority carriers ($p pprox n_i^2 / N_D$).

When forward bias reduces the barrier, majority electrons from the n-side flood into the p-side, where they become minority carriers and diffuse until they recombine with holes.

  • Minority Injection: Crucial principle enabling both junction diodes and bipolar transistors.
  • Diffusion Length $L$: Average distance a minority carrier travels before recombining: $L = \sqrt{D au}$.
$$Minority Diffusion Length: $L_n = \sqrt{D_n \tau_n} \quad\text{and}\quad L_p = \sqrt{D_p \tau_p}$$$
⚡ Junction Lab 2
Built-in Potential & Band Bending Calculator
Enter acceptor doping $N_A$ and donor doping $N_D$ to calculate the built-in potential $V_{bi}$, Fermi level positions, and band curvature.
P-Side Doping $N_A$ ($10^{16}\text{ cm}^{-3}$)10 ×10¹⁶
N-Side Doping $N_D$ ($10^{16}\text{ cm}^{-3}$)10 ×10¹⁶
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Built-in Potential $V_{bi}$
0.814 V
$E_F - E_v$ (P-side)
0.168 eV
$E_c - E_F$ (N-side)
0.168 eV
🎓 Level 2 Assessment
Knowledge Check: Equilibrium & Band Bending
1. In thermal equilibrium with no applied voltage, why is the net current through a P-N junction zero?
2. What happens to the Fermi level ($E_F$) across a P-N junction in thermodynamic equilibrium?
3. What is the minority carrier diffusion length $L_n$?

Level 2 Completed: Certified Junction Electrostatics Specialist

Conferred for demonstrated mastery of diffusion-drift equilibrium, Fermi level alignment, and energy band bending physics.

Academic Level 3 • Ages 14–18
The Shockley Ideal Diode Equation
Master William Shockley's celebrated equation, reverse saturation current $I_0$, temperature dependence, and dynamic resistance.
Module 3.1

William Shockley's 1949 Derivation

In 1949, William Shockley derived the fundamental mathematical equation governing carrier transport across a P-N junction under applied bias $V$.

By applying Boltzmann boundary conditions at the depletion edges ($p(x_n) = p_{n0} e^{qV/k_B T}$), he solved the steady-state diffusion equation to obtain the classic diode law.

  • Ideality Factor $\eta$: In ideal diffusion, $\eta = 1$. In real diodes with recombination in the depletion zone, $\eta pprox 1.5 - 2.0$.
  • Thermal Voltage $V_T$: $V_T = rac{k_B T}{q} pprox 25.85\ ext{mV}$ at room temperature ($300\ ext{K}$).
$$Shockley Ideal Diode Equation: $I = I_0 \left( \exp\left(\frac{q V}{\eta k_B T}\right) - 1 \right)$$$
Module 3.2

Reverse Saturation Current ($I_0$) Origins

The coefficient $I_0$ represents the tiny reverse current that flows when reverse bias sweeps minority carriers across the junction. It depends purely on minority carrier generation within one diffusion length of the depletion edge.

Because $I_0$ is proportional to $n_i^2 \propto T^3 e^{-E_g / k_B T}$, reverse leakage current doubles roughly every 7 to 10 °C increase in temperature!

  • Material Parameters: $I_0 = q A \left( rac{D_p p_{n0}}{L_p} + rac{D_n n_{p0}}{L_n} ight) = q A n_i^2 \left( rac{D_p}{L_p N_D} + rac{D_n}{L_n N_A} ight)$.
  • Thermal Sensitivity: High temperatures dramatically increase reverse leakage in silicon chips.
$$Reverse Saturation Current: $I_0 = q A n_i^2 \left( \frac{D_p}{L_p N_D} + \frac{D_n}{L_n N_A} \right)$$$
Module 3.3

Small-Signal Dynamic Resistance ($r_d$)

For small AC signals superimposed on a DC forward bias $I_D$, the junction behaves as a small-signal dynamic resistance $r_d = \left( rac{dI}{dV} ight)^{-1}$.

Differentiating the Shockley equation yields $r_d = rac{\eta V_T}{I_D}$. At a bias of $1\ ext{mA}$, dynamic resistance is an astonishingly low $26\ \Omega$!

  • Small-Signal Rule: Dynamic resistance is inversely proportional to DC bias current: $r_d \propto 1/I_D$.
  • Varactor & RF Attenuator: Variable DC current directly tunes the AC impedance of the diode.
$$Dynamic Resistance: $r_d = \frac{dV}{dI} = \frac{\eta k_B T}{q (I_D + I_0)} \approx \frac{\eta V_T}{I_D}$$$
⚡ Junction Lab 3
Shockley Diode IV Curve & Dynamic Resistance Engine
Calculate forward current $I_D$, reverse saturation current $I_0$, and small-signal dynamic resistance $r_d$ across temperature and ideality factor.
Forward Bias $V$ (V)0.65 V
Ideality Factor $\eta$1.2
Temperature $T$ (K)300 K
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Forward Current $I_D$
1.85 mA
Dynamic Resistance $r_d$
16.8 Ω
Leakage $I_0$
1.42 pA
🎓 Level 3 Assessment
Knowledge Check: Shockley Diode Law
1. What is the value of thermal voltage $V_T = k_B T / q$ at standard room temperature ($300\text{ K}$)?
2. If a diode carries a forward DC bias current of $I_D = 2.6\ \text{mA}$ with ideality factor $\eta = 1$, what is its AC dynamic resistance $r_d$?
3. Why does the reverse saturation current $I_0$ increase so rapidly with temperature?

Level 3 Completed: Shockley Diode Equations Specialist

Conferred for mastery of the Shockley diode equation, reverse saturation current physics, and small-signal dynamic resistance.

Academic Level 4 • Undergraduate BS
Poisson Electrostatics & Depletion Capacitance
Solve Poisson's equation analytically under the depletion approximation, derive depletion width $W_{dep}$, and calculate junction capacitance.
Module 4.1

Solving Poisson's 1D Equation

Inside the depletion region, mobile carrier concentrations are negligible compared to ionized dopants. Poisson's equation reduces to piecewise constant charge densities.

Integrating $ rac{d^2\psi}{dx^2} = - rac{ ho(x)}{\epsilon_s}$ twice with boundary conditions of zero electric field at the depletion edges yields triangular electric field profiles and parabolic potential distributions.

  • Peak Electric Field: Occurs exactly at the metallurgical junction ($x=0$): $\mathcal{E}_{max} = rac{2(V_{bi}-V)}{W}$.
  • Charge Neutrality: $q N_A x_p = q N_D x_n$ (depletion penetrates deeper into the lightly doped side).
$$Peak Electric Field: $\mathcal{E}_{max} = \sqrt{\frac{2 q (V_{bi}-V)}{\epsilon_s} \left(\frac{N_A N_D}{N_A + N_D}\right)}$$$
Module 4.2

The Depletion Width Formula

Summing the depletion penetration depths $x_n$ and $x_p$ yields the total depletion width $W = x_n + x_p$.

Under reverse bias ($V < 0$), $(V_{bi} - V)$ increases, causing the depletion region to widen proportionally to the square root of reverse voltage.

  • Asymmetric One-Sided Junction ($p^+ - n$): When $N_A \gg N_D$, $W pprox x_n = \sqrt{ rac{2\epsilon_s (V_{bi}-V)}{q N_D}}$.
  • Voltage Dependency: $W(V) \propto \sqrt{V_{bi} - V}$.
$$Total Depletion Width: $W = \sqrt{\frac{2 \epsilon_s}{q} \left(\frac{N_A + N_D}{N_A N_D}\right) (V_{bi} - V)}$$$
Module 4.3

Depletion & Diffusion Capacitances

A reverse-biased P-N junction stores dipole charge across the depletion layer, behaving as a voltage-dependent capacitor: $C_j = \left| rac{dQ}{dV} ight| = rac{\epsilon_s A}{W}$.

Under forward bias, a second capacitance dominates: Diffusion Capacitance ($C_{diff}$), representing stored minority carrier charge in the neutral regions.

  • Depletion Capacitance: $C_j = rac{C_{j0}}{\sqrt{1 - V/V_{bi}}}$ (basis of RF varactor tuning diodes).
  • Diffusion Capacitance: $C_{diff} = rac{q I_D au_{tr}}{k_B T}$ (proportional to forward current $I_D$).
$$Capacitance Decomposition: $C_{total} = C_j(V) + C_{diff}(I_D) = \frac{\epsilon_s A}{W(V)} + \frac{q I_D \tau}{k_B T}$$$
⚡ Junction Lab 4
Poisson Depletion Solver & Varactor $C-V$ Profiler
Calculate depletion width $W$, peak electric field $\mathcal{E}_{max}$, and junction capacitance $C_j$ across bias voltage.
Reverse Bias $-V_R$ (V)-3.0 V
Substrate Doping $N_D$ ($10^{16}\text{ cm}^{-3}$)5 ×10¹⁶
Junction Area $A$ ($10^{-4}\text{ cm}^2$)5 ×10⁻⁴
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Depletion Width $W$
0.98 µm
Peak Field $\mathcal{E}_{max}$
77.5 kV/cm
Capacitance $C_j$
5.32 pF
🎓 Level 4 Assessment
Knowledge Check: Poisson Electrostatics & Capacitance
1. In an asymmetric one-sided junction where the p-side is heavily doped ($p^+ - n$, with $N_A \gg N_D$), where does the depletion region primarily extend?
2. How does the depletion capacitance $C_j$ scale with applied reverse voltage $V_R$ in a step junction?
3. What is the physical origin of Diffusion Capacitance ($C_{diff}$) in a forward-biased diode?

Level 4 Completed: Bachelor of Science in Junction Physics

Conferred for undergraduate mastery of Poisson electrostatics, depletion width derivations, and voltage-dependent capacitance modeling.

Academic Level 5 • Graduate MS
Junction Breakdown & Recombination Physics
Examine quantum Zener tunneling, avalanche impact ionization, Shockley-Read-Hall (SRH) recombination, and Auger limits.
Module 5.1

Avalanche Breakdown & Impact Ionization

When reverse voltage exceeds a critical threshold, the electric field in the depletion region reaches hundreds of kilovolts per centimeter ($\mathcal{E} > 3 imes 10^5\ ext{V/cm}$).

Carriers gain sufficient kinetic energy between collisions to knock valence electrons into the conduction band, creating new electron-hole pairs in a cascading Avalanche Multiplication process.

  • Ionization Coefficients $lpha_n, lpha_p$: Number of electron-hole pairs generated per unit centimeter of carrier travel.
  • Breakdown Criterion: $\int_0^W lpha_n \exp\left[-\int_0^x (lpha_n - lpha_p) dx' ight] dx = 1$ (multiplication factor $M o \infty$).
$$Empirical Avalanche Breakdown Voltage: $V_{BR} \approx 60 \left(\frac{E_g}{1.1\ \text{eV}}\right)^{3/2} \left(\frac{N_D}{10^{16}\ \text{cm}^{-3}}\right)^{-3/4}\ \text{Volts}$$$
Module 5.2

Zener Quantum Tunneling Breakdown

In heavily doped junctions ($N_A, N_D > 10^{18}\ ext{cm}^{-3}$), the depletion width becomes ultra-thin ($W < 10\ ext{nm}$).

The conduction and valence bands overlap in space, allowing electrons to quantum-tunnel directly from the valence band of the p-side into the conduction band of the n-side without any collision. This is Zener Breakdown.

  • Voltage Separation: Zener occurs below $5 ext{V}$ (negative temperature coefficient). Avalanche occurs above $6 ext{V}$ (positive temperature coefficient).
  • Zero-Tempco Diodes: Zener diodes rated near $5.6 ext{V}$ balance both mechanisms, achieving near-zero temperature drift.
$$Wentzel-Kramers-Brillouin (WKB) Tunneling: $T_t \approx \exp\left( -\frac{4 \sqrt{2 m^*} E_g^{3/2}}{3 q \hbar \mathcal{E}} \right)$$$
Module 5.3

Shockley-Read-Hall (SRH) Recombination in the Depletion Zone

At low forward bias ($V < 0.4 ext{V}$), carrier recombination within the depletion region through mid-gap defect states (deep levels) dominates over neutral bulk diffusion.

This explains why real diodes exhibit an ideality factor $\eta pprox 2$ at microamp currents, transitioning to $\eta pprox 1$ at milliamp currents where ideal diffusion dominates.

  • Recombination Rate $U_{SRH}$: Peaks when energy level is near mid-gap: $E_t pprox E_i$.
  • Depletion Recombination Current: $I_{rec} = q rac{n_i W}{2 au_0} e^{qV / (2 k_B T)}$.
$$SRH Recombination Rate: $U_{SRH} = \frac{p n - n_i^2}{\tau_p (n + n_1) + \tau_n (p + p_1)}$$$
⚡ Junction Lab 5
Zener vs Avalanche Breakdown Discriminator
Analyze breakdown voltage $V_{BR}$, temperature coefficient, and tunneling probability across dopant concentrations $N_A, N_D$.
Junction Doping ($10^{17}\text{ cm}^{-3}$)2.0 ×10¹⁷
Operating Temperature (°C)25 °C
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Breakdown Voltage $V_{BR}$
16.4 V
Dominant Mechanism
Avalanche Multiplication
Temp Coefficient
+14.2 mV/°C
🎓 Level 5 Assessment
Knowledge Check: Breakdown & SRH Dynamics
1. How do you experimentally distinguish between Zener tunneling breakdown and Avalanche multiplication breakdown using temperature?
2. Why does a diode's current-voltage slope show an ideality factor $\eta \approx 2$ at very low forward voltages ($< 0.3\text{V}$)?
3. At what breakdown voltage does a standard Zener diode exhibit near-zero temperature coefficient?

Level 5 Completed: Master of Science in Junction Breakdown & Recombination

Conferred for graduate mastery of avalanche impact ionization, Zener band-to-band tunneling, and Shockley-Read-Hall recombination kinetics.

Academic Level 6 • Doctoral PhD
Heterojunctions & Bandgap Engineering
Analyze semiconductor heterojunctions, Anderson's electron affinity rule, 2D electron gases (2DEG), and quantum well band offsets.
Module 6.1

Anderson's Rule & Band Discontinuities

When two different semiconductor crystals are joined epitaxially (such as GaAs/AlGaAs or Si/SiGe), differences in electron affinity $\chi$ and bandgap $E_g$ create sharp steps in the conduction and valence band edges.

According to Anderson's electron affinity rule, the conduction band discontinuity equals the difference in electron affinities: $\Delta E_c = \chi_1 - \chi_2$. The valence band discontinuity absorbs the remainder: $\Delta E_v = \Delta E_g - \Delta E_c$.

  • Conduction Band Offset: $\Delta E_c = \chi_A - \chi_B$.
  • Valence Band Offset: $\Delta E_v = \Delta E_g - \Delta E_c$ (often modified by interface dipoles).
$$Anderson's Band Offset Rule: $\Delta E_c = \chi_1 - \chi_2 \quad\text{and}\quad \Delta E_v = (E_{g1} - E_{g2}) - \Delta E_c$$$
Module 6.2

Modulation Doping & The 2D Electron Gas (2DEG)

In a classic P-N junction, high carrier density requires high dopant concentration, which introduces ionized impurity scattering that severely degrades electron mobility.

Horst Störmer and Ray Dingle invented Modulation Doping: dopants are placed exclusively in a wide-bandgap layer (AlGaAs), while electrons spill over into an undoped narrow-bandgap channel (GaAs), forming a triangular quantum well with mobility exceeding $10^6\ ext{cm}^2/ ext{V}\cdot ext{s}$!

  • Separation of Carriers: Mobile electrons are spatially separated from parent donor ions by an undoped spacer layer.
  • Fractional Quantum Hall Effect: This clean 2DEG earned Störmer, Tsui, and Laughlin the 1998 Nobel Prize in Physics.
$$2DEG Sheet Carrier Density: $n_s = \frac{\epsilon}{q d} \left( V_g - V_{off} \right) \approx 10^{11} \text{ to } 10^{12}\ \text{cm}^{-2}$$$
Module 6.3

Graded Heterojunctions & Quasi-Electric Fields

Herbert Kroemer (2000 Nobel Laureate) proved that by spatially grading the alloy composition $x(z)$ of a semiconductor (such as $ ext{Si}_{1-x} ext{Ge}_x$), one creates asymmetric effective forces on electrons and holes independently.

The spatial gradient of the band edge creates a quasi-electric field $\mathcal{E}^* = - rac{1}{q} rac{dE_c}{dx}$ that accelerates electrons across a base region without applying any external voltage!

  • Independent Carrier Forces: $\mathcal{E}_n^* e \mathcal{E}_p^*$ (impossible in homojunction silicon!).
  • Terahertz Transistors: Powers modern SiGe Heterojunction Bipolar Transistors (HBTs) exceeding 500 GHz.
$$Quasi-Electric Drift Field: $\mathcal{E}_n^* = -\frac{1}{q} \frac{d E_c}{dx} = -\frac{1}{q} \left( \frac{d E_v}{dx} + \frac{d E_g}{dx} \right)$$$
⚡ Junction Lab 6
Heterojunction Band Offset & 2DEG Density Solver
Simulate AlGaAs/GaAs and Si/SiGe heterojunctions, calculating $\Delta E_c$, $\Delta E_v$, 2DEG sheet density $n_s$, and quasi-electric field.
Alloy Fraction $x$ (% Ge or Al)25%
Undoped Spacer Thickness $d_{sp}$ (nm)5 nm
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Conduction Offset $\Delta E_c$
187 meV
Valence Offset $\Delta E_v$
125 meV
2DEG Density $n_s$
6.8 × 10¹¹ cm⁻²
🎓 Level 6 Assessment
Knowledge Check: Heterojunctions & 2DEG
1. What is the fundamental mechanism behind modulation doping that allows 2D electron gas (2DEG) mobilities to exceed 1,000,000 cm²/V·s?
2. According to Anderson's rule, what determines the conduction band discontinuity $\Delta E_c$ at an ideal heterojunction?
3. What is a 'quasi-electric field' created by bandgap grading in a heterojunction?

Level 6 Completed: Doctor of Philosophy in Semiconductor Heterojunctions

Conferred for doctoral mastery of heterojunction band offset physics, modulation-doped 2DEG mechanics, and bandgap engineering.

Academic Level 7 • Industry Fellow
Sub-10nm Ultra-Shallow & 2D van der Waals Junctions
Examine sub-10nm ultra-shallow junction depth ($X_j$), millisecond laser spike annealing, 2D monolayer p-n junctions, and Tunnel FETs.
Module 7.1

The Ultra-Shallow Junction Scaling Crisis

In sub-3nm GAA nanosheet transistors, source and drain junctions must be fabricated with junction depths under 8 nanometers ($X_j < 8\ ext{nm}$) and abruptness steeper than $1.5\ ext{nm/decade}$.

Standard furnace diffusion causes thermal dopant spreading that shorts out the sub-15nm channel. Foundries deploy Millisecond Laser Spike Annealing (LSA) and Flash Annealing to activate dopants above $1200^\circ ext{C}$ in microseconds without diffusion.

  • Cluster Ion Implantation: Decaborane ($ ext{B}_{10} ext{H}_{14}$) and carborane ions implanted at sub-keV energies.
  • Transient Enhanced Diffusion (TED): Point defect engineering using carbon co-implants to trap interstitial silicon atoms.
$$Diffusion Length Limit: $\sqrt{D t} < 1.0\ \text{nm} \implies t_{\text{anneal}} < 1\ \text{millisecond}$$$
Module 7.2

2D van der Waals Heterojunctions ($ ext{MoS}_2 / ext{WSe}_2$)

Traditional 3D semiconductors require rigorous atomic lattice matching; otherwise, interface misfit dislocations create catastrophic recombination traps.

Two-dimensional Transition Metal Dichalcogenides (TMDs) bond via weak van der Waals forces. Pristine p-n junctions can be stacked between monolayer n-type $ ext{MoS}_2$ and p-type $ ext{WSe}_2$ with zero dangling bonds.

  • Zero Dangling Bonds: Atomic smoothness eliminating surface recombination velocity.
  • Atomically Thin: Total junction thickness is only two atomic layers ($pprox 1.3\ ext{nm}$).
$$van der Waals Interface: $\text{Interface Defect Density } D_{it} < 10^{10}\ \text{cm}^{-2}\text{eV}^{-1}$$$
Module 7.3

Tunneling Field-Effect Transistors (TFETs)

Standard P-N junctions rely on thermal thermionic emission over a barrier, imposing the fundamental thermodynamic 'Boltzmann Tyranny' of $60\ ext{mV/decade}$ subthreshold swing at room temperature.

Tunneling FETs utilize Band-to-Band Tunneling (BTBT) across a reverse-biased staggered or broken-gap heterojunction, filtering out high-energy thermal tails and enabling steep sub-60 mV/dec switching.

  • Beating 60 mV/dec: Enables aggressive supply voltage scaling down to $V_{DD} < 0.3\ ext{V}$.
  • Type-III Broken Gap: InAs/GaSb heterojunctions align the InAs conduction band below the GaSb valence band for ballistic tunneling.
$$Sub-60 mV/dec TFET Limit: $S = \ln(10) \left( \frac{d \ln I_D}{d V_{GS}} \right)^{-1} < 60\ \text{mV/dec at 300K}$$$
⚡ Junction Lab 7
Ultra-Shallow Junction & TFET Band-to-Band Tunneling Lab
Model junction depth $X_j$, sheet resistance $R_s$, and band-to-band tunneling (BTBT) current across broken-gap heterojunction alignments.
Junction Depth $X_j$ (nm)8 nm
Tunneling Bias $V_{DS}$ (V)0.4 V
REAL-TIME SIMULATION TELEMETRY
Interactive physics simulator running client-side transfer models, carrier drift-diffusion kinetics, and boundary potential solvers.
Sheet Resistance $R_s$
425 Ω/sq
BTBT Current Density
18.4 µA/µm
Subthreshold Swing $S$
42 mV/dec
🎓 Level 7 Assessment
Knowledge Check: Sub-10nm & 2D Junction Fellow Mastery
1. How do Tunneling Field-Effect Transistors (TFETs) achieve subthreshold swings steeper than the fundamental 60 mV/decade Boltzmann limit at room temperature?
2. Why are 2D Transition Metal Dichalcogenide (TMD) van der Waals heterojunctions ($ ext{MoS}_2 / ext{WSe}_2$) free from misfit dislocation defects?
3. What thermal annealing technique is used in sub-3nm logic nodes to activate dopants at $>1200^\circ ext{C}$ while keeping junction depth $X_j < 8 ext{ nm}$?

Level 7 Completed: Distinguished Semiconductor Junction Physics Fellow

Conferred for lifetime mastery of semiconductor junction physics across 7 tiers: from P-N depletion electrostatics to quantum heterojunctions, 2D van der Waals interfaces, and sub-60 mV/dec steep-slope switching.

🏅
Distinguished Semiconductor Junction Physics Fellow
Highest academic honor conferred by ChipFoundryServices OS for demonstrated mastery across all 7 curriculum tiers, interactive simulation laboratories, and verified examination standards.