Bipolar Ecl 1960s Build the or NOR Gate and Basic Logic Functions
# Bipolar ECL Logic (1960s): Step 14 — Building the OR/NOR Gate and Basic Logic Functions
Assembling everything from Steps 2-8 into the actual logic gates a 1960s designer could buy. With the current switch, output buffering, logic levels, V_BB reference, and wired-OR all established, this step shows how those pieces combine into the small set of basic gate types — primarily OR/NOR — that made up the bulk of the earliest MECL catalog, and why ECL's natural gate function is OR/NOR rather than AND/NAND.
## 1. Why ECL's Natural Gate Is OR/NOR, Not AND/NAND
A single current switch with multiple input transistors connected in parallel to the same collector node (each with its own base driven by a separate input, all sharing the same emitter node and current source) produces a current-switch output that goes to the 'high' collector state if any one of the parallel input transistors is driven high — an OR function at that collector, and its complementary collector (shared with the V_BB-referenced side of the switch) produces the NOR function simultaneously, at no extra circuit cost. Building an AND/NAND function directly in a single current-switch stage is awkward by comparison, because AND requires all inputs to agree rather than any one input to dominate, which does not map naturally onto a single shared-emitter current-steering structure. This is why the overwhelming majority of 1960s MECL catalog parts were OR/NOR gates, and why ECL system designers built AND functions, when needed, from combinations of OR/NOR gates and inversions (or exploited De Morgan's theorem against the negative-logic convention) rather than looking for a native ECL AND gate.
## 2. Real Diagram: ECL OR/NOR Gate, Full Schematic
## 3. Dual-Rail Outputs as a Standard Feature
Because both collector nodes of the current switch are already present inside the gate, 1960s MECL parts routinely brought both the OR and NOR outputs out to separate package pins as a standard feature — a true complementary-output gate at no additional transistor cost, something saturating logic families generally could not offer without a dedicated inverter stage. This dual-rail output became a defining convenience of ECL board design, letting designers route whichever polarity a downstream gate needed without an extra inversion stage and its accompanying delay.
## 4. Companion Diagram: Stage Sequence and Trend Summary
## Building the OR/NOR Gate and Basic Logic Functions's Place in the Process Lineage
This is step 14 of 20 in the Bipolar ECL Logic (1960s) series, showing how the current-switch and output-buffer elements from earlier steps combine into the OR/NOR gates that formed the bulk of the first commercial ECL catalogs.