Deep Submicron CMOS Scaling 1990s Engineer the Lightly Doped Drain Structure

# Deep Submicron CMOS Scaling (1990s): Step 3 — Engineer the Lightly Doped Drain (LDD) Structure

## 1. The Core Idea: Grade the Field Instead of Fighting It Directly

A conventional drain junction has an abrupt, heavily doped boundary right at the edge of the gate, which concentrates the entire voltage drop between channel and drain across a very short distance — exactly the condition that produces the sharp field peak Step 2 identified as the hot-carrier driver. The lightly doped drain structure inserts a second, much more lightly doped implant of the same polarity between the channel and the heavily doped drain contact region, spreading the voltage drop over a longer distance and lowering the peak field at any single point, without changing the overall channel length or the drain contact's low resistance where it meets metal.

## 2. Two Doping Levels, Two Different Jobs

The lightly doped region (typically an order of magnitude lower peak concentration than the main drain) sits immediately adjacent to the channel, where its job is purely to soften the field gradient — it carries current but is not meant to minimize resistance. The heavily doped region further from the channel is sized for low contact resistance to the silicide and metal layers Steps 8 through 10 of this series cover, since by the time current reaches that region the field has already been smoothed by the lightly doped section. This two-level doping profile is why the structure needs a self-aligned implant sequence rather than a single drain implant — a requirement Step 4 covers.

## 3. The Trade LDD Makes

Grading the field does not come free: the added lightly doped region increases drain series resistance compared to an abrupt junction, which costs some drive current and switching speed. 1990s process designers accepted this trade because the alternative — running an abrupt-junction device at deep submicron channel lengths — would have produced hot-carrier lifetimes far too short for commercial reliability targets, as Step 2's quantitative lifetime-vs-field relationship showed. The LDD structure became close to universal in 1990s CMOS exactly because it converts an otherwise unacceptable reliability problem into an acceptable, well-characterized speed penalty.

## 4. Connecting Back to Ion Implantation

The `ion_implantation` series already established implantation as the controlled, repeatable way to place dopant at a precise depth and concentration — LDD is one of the most consequential applications of that general capability, because it requires two implants of different doses and depths to land in nearly the same lateral location relative to the gate edge, something a diffusion-based doping process from earlier eras could not have controlled well enough to be useful.

LDD Spreads the Field Instead of Concentrating It lateral electric field profile from channel to drain contact, abrupt junction vs. graded LDD junction abrupt junction — field concentrated at one point LDD junction — field spread over the lightly doped region same peak voltage drop, much lower peak field with LDD distance from channel edge toward the drain contact lower peak field at equal voltage drop is the entire point of grading the junction the cost is added series resistance in the lightly doped region
Two Doping Regions, Two Different Jobs cross-section view of the graded drain near the gate edge CHANNEL EDGE where the field used to peak in an abrupt junction LIGHTLY DOPED REGION softens the field gradient, carries current, adds resistance HEAVILY DOPED CONTACT low-resistance tie to silicide and metal further from the gate two implant doses placed at nearly the same lateral position — a job for self-aligned spacers

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