Explain Row Address Strobe Timing

# Explain Row-Address-Strobe Timing

With address pins now shared across two phases, the chip needed a signal telling it exactly when the row half of the address was valid on those shared pins.

That signal was the row address strobe, a dedicated control pin that the memory controller pulsed low to tell the chip: the bits on the address pins right now are the row address, latch them.

Once latched internally, the row address selected one full row of memory cells for the sense amplifiers to work on, independent of whatever appeared on the address pins afterward.

ROW ADDRESS STROBE (RAS)Pin roletells the chip when row bits are validTimingasserted first in the access cycleEffectlatches the row address, selects one row of cells

Diagram above: row address strobe (ras).

ROW SELECTION IN CONTEXTArray accessa DRAM read always starts by picking a rowSense ampswake up for the selected row onlyNext phasecolumn address strobe follows to pick one bit in that row

Diagram above: row selection in context.

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