Explain Column Address Strobe Timing

# Explain Column-Address-Strobe Timing

After the row address was latched and the row of cells was active, the chip needed a second signal to say when the column half of the address appeared on the same shared pins.

That signal was the column address strobe, asserted after the row address strobe, telling the chip to latch the column address and use it to select one bit out of the already-active row.

Together, row address strobe and column address strobe turned one shared set of physical pins into a two-step addressing sequence that fully specified any bit in the 4K array.

COLUMN ADDRESS STROBE (CAS)Pin roletells the chip when column bits are validTimingasserted after row address strobeEffectselects one bit within the already-active row

Diagram above: column address strobe (cas).

RAS AND CAS TOGETHERStep 1RAS low, row address latched, row activatedStep 2CAS low, column address latched, bit selectedOutcomefull address resolved using half the physical pins

Diagram above: ras and cas together.

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