DRAM-Scaling-1974 Step 16 Texture Stacked Capacitor Surfaces with Hemispherical Grain

# Texture the Stacked Capacitor's Own Surface: Hemispherical-Grain Polysilicon

Step 15 named high-permittivity dielectrics as one lever beyond pure geometry; the stacked path also developed a surface-texturing technique that recovers area without changing a cell's overall footprint or height at all, worth treating on its own terms.

## 1. State the Surface-Area Problem a Smooth Stack Still Has

A stacked capacitor built as a smooth polysilicon "crown" (Step 4's own structure) has a surface area set entirely by its outer geometric shape — height, width, and whatever folding or fin structure the crown design uses. Once that outer shape is already constrained by the array's own cell pitch, no further geometric growth is available without consuming area neighboring cells need.

Texture the Stacked Capacitor's Own Surface: Hemispherical-Grain Polys Step 16 — dram-scaling-1974 State the Surface-Area Problem a Smooth Stack St see Section 1 State the Hemispherical-Grain Response see Section 2 Confirm This Is the Stacked Path's Own Specific see Section 3 THREE-PART ARGUMENT, ONE STEP dram-scaling-1974 extension, step 16 of this project's DRAM lineage

## 2. State the Hemispherical-Grain Response

Hemispherical-grain (HSG) polysilicon deliberately roughens the capacitor's own surface at a microscopic scale — growing small, rounded silicon grains across what would otherwise be a smooth surface — multiplying the effective surface area available for charge storage within the same outer geometric footprint. This is a texture-level area recovery, distinct from both the shape-level area recovery (Steps 3, 4) and the materials-permittivity lever (Step 15); it changes neither the capacitor's outer dimensions nor its dielectric material, only the microscopic roughness of the surface those dimensions enclose.

Step 16 in the Dram-Scaling-1974 Lineage what this step inherits and what it hands forward, by name Step 16 this step Inherits prior steps Hands Off named thread NO CELL-PHYSICS OR ARCHITECTURE RE-ARGUED each step adds a distinct angle; none re-derive settled prior content

## 3. Confirm This Is the Stacked Path's Own Specific Answer

HSG texturing is specific to the stacked path's polysilicon crown structure (Step 4) — a trench capacitor's buried, substrate-etched sidewall is not textured the same way, and does not need to be, since its area-recovery lever is depth (Step 3) rather than surface roughness. Naming HSG here completes the stacked path's own toolkit of area-recovery techniques (shape, texture, and — combined with Step 15 — permittivity) exactly as thoroughly as Step 13's deep-RIE equipment story completed the trench path's own toolkit.

Take dram-scaling-1974 step 16 texture stacked capacitor surfaces with hemispherical grain further

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