tsv resistance
**TSV Resistance** is the **electrical resistance of a through-silicon via, determined by the copper fill's resistivity, the via's length and cross-sectional area, and frequency-dependent effects like skin effect** — typically 20-100 mΩ per via for production copper-filled TSVs, low enough to support multi-GHz signaling and high-current power delivery between stacked dies with minimal voltage drop and signal degradation.
**What Is TSV Resistance?**
- **Definition**: The DC and AC electrical resistance of the copper conductor within a through-silicon via, calculated from R = ρL/A where ρ is copper resistivity (1.7-2.5 μΩ·cm for electroplated Cu), L is via length (50-100 μm), and A is the cross-sectional area (π(d/2)² for diameter d).
- **DC Resistance**: For a typical 5 μm diameter × 50 μm deep copper TSV: R = 2.0 μΩ·cm × 50 μm / (π × (2.5 μm)²) ≈ 50 mΩ — low enough that thousands of parallel TSVs contribute negligible resistance to the total signal or power path.
- **AC Resistance (Skin Effect)**: At high frequencies, current crowds toward the conductor surface within a skin depth δ = √(ρ/πfμ₀) — at 10 GHz, δ ≈ 0.66 μm in copper, meaning a 5 μm diameter TSV's effective cross-section is significantly reduced, increasing AC resistance by 2-5×.
- **Contact Resistance**: The total TSV resistance includes the contact resistance at both ends (TSV-to-BEOL metal and TSV-to-backside RDL) — typically 0.1-1 Ω per contact, often dominating the total via resistance.
**Why TSV Resistance Matters**
- **Power Delivery**: TSVs carry power (VDD, VSS) between stacked dies — resistance causes IR drop (voltage loss) that reduces the supply voltage reaching the top die, degrading performance and potentially causing timing failures.
- **Signal Integrity**: For high-speed signals, TSV resistance contributes to the RC time constant that limits bandwidth — lower resistance enables higher data rates between stacked dies.
- **Power Dissipation**: Current flowing through TSV resistance generates I²R heating — for HBM with thousands of TSVs carrying hundreds of milliamps each, TSV resistive heating contributes to the thermal budget of the stack.
- **Design Budgeting**: Chip designers must account for TSV resistance in their power grid and signal timing analysis — accurate TSV resistance models are essential for 3D IC design closure.
**Factors Affecting TSV Resistance**
- **Diameter**: Larger diameter = lower resistance (R ∝ 1/d²) but larger footprint — 10 μm diameter has 4× lower resistance than 5 μm diameter.
- **Copper Grain Structure**: Electroplated copper resistivity depends on grain size — as-plated fine-grained copper has ρ ≈ 2.2-2.5 μΩ·cm; after annealing (grain growth), ρ drops to 1.8-2.0 μΩ·cm.
- **Liner/Barrier Thickness**: The barrier and liner consume part of the via diameter — in a 5 μm via with 500 nm liner + 30 nm barrier, the effective copper diameter is only ~3.9 μm, increasing resistance by ~65%.
- **Temperature**: Copper resistivity increases ~0.4%/°C — at 100°C operating temperature, resistance is ~30% higher than room temperature values.
- **Voiding**: Any voids in the copper fill reduce the effective cross-section and increase resistance — a 10% void fraction increases resistance by ~11%.
| TSV Geometry | DC Resistance | AC Resistance (10 GHz) | Power Drop (100 mA) |
|-------------|-------------|----------------------|-------------------|
| 5 μm × 50 μm | ~50 mΩ | ~150 mΩ | 5 mV |
| 10 μm × 50 μm | ~13 mΩ | ~30 mΩ | 1.3 mV |
| 5 μm × 100 μm | ~100 mΩ | ~300 mΩ | 10 mV |
| 10 μm × 100 μm | ~25 mΩ | ~60 mΩ | 2.5 mV |
**TSV resistance is the fundamental electrical parameter governing 3D IC power delivery and signal performance** — kept low by copper's excellent conductivity and the relatively large via cross-section compared to on-chip wires, enabling the thousands of parallel vertical connections that provide the bandwidth and power delivery capacity required by HBM memory stacks and 3D processors.