tsv technology

**Through-Silicon Via (TSV)** — vertical electrical connections that pass completely through a silicon die, enabling 3D stacking of multiple chips for higher bandwidth and density. **Fabrication** 1. **Deep Etch**: Bosch process etches high-aspect-ratio holes through silicon (5-10um diameter, 50-100um deep) 2. **Insulation**: Deposit SiO2 liner to isolate TSV from silicon substrate 3. **Barrier/Seed**: Deposit TaN/Ta barrier + Cu seed by PVD 4. **Fill**: Electroplate copper to fill the via 5. **CMP**: Planarize top surface 6. **Reveal**: Thin wafer from backside to expose TSV tips **TSV Types** - **Via-first**: TSVs before transistor fabrication. Best quality but limits thermal budget - **Via-middle**: TSVs after transistors, before BEOL. Most common for logic - **Via-last**: TSVs after all processing. Simplest but worst electrical performance **Applications** - **HBM (High Bandwidth Memory)**: Stack 4-12 DRAM dies with TSVs. 1TB/s+ bandwidth - **3D NAND**: Though NAND uses charge-trap strings, not TSVs - **2.5D Interposers**: Silicon interposer connects chiplets (NVIDIA H100, AMD MI300) - **CMOS Image Sensors**: Stack sensor + logic dies (Sony) **TSVs** are the enabling technology for 3D integration and advanced packaging — essential for the chiplet era.