SerDes & Die-to-Die Link-Budget Simulator

Model whether a high-speed serial lane closes its link budget — and how fast you can push it — then run it: the simulation executes on the ChipFoundryServices compute pool. A lane at rate R with b bits/symbol runs at baud R/b, Nyquist baud/2; PAM4 (b=2) halves that frequency vs NRZ — less channel loss — but splits the swing into 3 sub-eyes a third the height. Channel insertion loss IL = reach·(kskin√f + kdielf) shrinks the received swing to Vtx·10-IL/20; the vertical eye is swing/(levels-1). Noise is the RSS of crosstalk (worse at tight bump pitch), residual ISI that equalization cannot cancel, and a thermal floor. Q = half-eye / noise gives raw BER = ½ erfc(Q/√2), and RS-FEC (KP4) corrects a raw BER up to ~2.4e-4 down to 1e-15 — a coding gain that lowers the required Q. Link margin = 20·log10(Q / Qreq) dB; ≥0 means the link closes. The node returns the insertion loss, eye and Q, the raw and post-FEC BER, the margin, the pJ/bit and lane power, the beachfront lane fit, the fastest rate the channel carries, and the operating regime. Reduced-order educational model. See also the chiplet packaging, speculative-decoding, Mixture-of-Experts, FlashAttention, quantization, KV-cache, HBM bandwidth, systolic array, 3D-parallelism, power & thermal, transistor I-V, thermal, die-yield and lithography simulators and the compute-pool status.

UCIe die-to-die 112G PAM4 PCB 32G NRZ short 224G long-reach
Link margin vs lane data rate. Each bar is the closing margin (dB) at a standard rate on your channel: it shrinks as higher rates raise the Nyquist frequency and insertion loss, and goes negative once the eye closes. The dashed line marks 0 dB (break-even) and ▯ marks your rate; bars are green where the link closes, red where it fails — the fastest green bar is near the optimal rate
Left: insertion loss vs channel reach — loss climbs with length until it crosses the dashed loss budget where margin hits zero (▯ marks your reach). Right: the eye & noise budget — how open the received eye is, the crosstalk and ISI share of the noise, and the shoreline lane utilization
Developer API — same simulation over HTTP (load-balanced across the pool): 
curl -X POST https://www.chipfoundryservices.com/edge/serdes \
  -H "Content-Type: application/json" \
  -d '{"data_rate_gbps":112,"modulation":2,"channel_type":1,"reach_mm":20,
       "num_lanes":16,"lane_pitch_um":45,"shoreline_mm":8,"tx_swing_mvppd":800,
       "fec":1,"crosstalk_coeff":0.02,"noise_floor_mv":1.5}'
Returns JSON with outputs (format, modulation, channel, baud_gbd, nyquist_ghz, insertion_loss_db, rx_swing_mv, eye_height_mv, eye_open_percent, crosstalk_rms_mv, isi_rms_mv, noise_rms_mv, q_factor, q_required, raw_ber, post_fec_ber, fec_coding_gain_db, margin_db, loss_budget_db, link_closes, pj_per_bit, per_lane_power_w, aggregate_gbps, aggregate_tbps, total_power_w, max_lanes_shoreline, shoreline_use_percent, beachfront_limited, bw_density_gbps_per_mm, edge_bw_tbps, optimal_rate_gbps, verdict), the full profile (7-point margin_vs_stdrate, 48-point loss_vs_reach, margin_vs_reach and margin_vs_rate sweeps, plus data_rate_gbps, reach_mm, insertion_loss_db, loss_budget_db, margin_db, optimal_rate_gbps, eye_open_percent, xt_share, isi_share, th_share, shoreline_use_percent), the serving node, and compute_ms. Endpoint aliases /edge/ucie, /edge/pam4, /edge/linkbudget, /edge/signalintegrity, /edge/eye, /edge/lane.