w space vs z space, generative models
Different latent spaces in StyleGAN.
212 technical terms and definitions
Different latent spaces in StyleGAN.
W+ space allows per-layer style codes in StyleGAN providing greater editability.
Variation between wafers in same lot.
Pass/fail thresholds for wafer quality.
Special patterns for electrical testing.
Wafer acceptance tests verify incoming material quality before processing.
High-temp anneal to form precipitates.
Operations on wafer back surface.
Methods to join wafers together for 3D integration or SOI.
Join two wafers together for 3D integration or MEMS.
Curvature of thinned wafer.
Measure wafer curvature deviations.
Accidental wafer cracking during handling or processing.
Clean FOUPs and cassettes to prevent contamination.
Wafer cassettes hold multiple wafers in parallel slots for processing or storage.
Center die locations serve as reference points for radial pattern analysis.
Holds and often heats/cools wafer during processing.
Dedicated sink with DI water for manual wafer rinsing.
Wafer costs depend on process node wafer size and utilization.
# Semiconductor Die Dicing and Singulation: Mathematical Modeling Framework ## 1. Introduction and Overview Die dicing (singulation) is the process of separating individual semiconductor dies from a processed wafer. The mathematical modeling of this process spans multiple physics domains: - **Mechanics** - Cutting forces, stress distribution - **Thermodynamics** - Heat generation, thermal diffusion - **Fracture Mechanics** - Crack propagation, chipping - **Plasma Chemistry** - Etch rates, selectivity ### 1.1 Primary Dicing Methods | Method | Mechanism | Key Physics | |--------|-----------|-------------| | Blade Dicing | Mechanical abrasion | Contact mechanics, grinding | | Laser Dicing | Thermal ablation | Heat transfer, phase change | | Stealth Dicing | Internal modification | Nonlinear optics, fracture | | Plasma Dicing | Chemical etching | Plasma physics, reaction kinetics | ## 2. Wafer Geometry and Die Yield Calculations ### 2.1 Dies Per Wafer (DPW) - Basic Formula The fundamental yield calculation determines how many dies can be extracted from a circular wafer: $$ \text{DPW} = \frac{\pi \cdot \left(\frac{D_{wafer}}{2}\right)^2}{A_{die} + A_{scribe}} \times U $$ **Where:** - $D_{wafer}$ = Wafer diameter (mm) - Standard sizes: 150mm, 200mm, 300mm - $A_{die}$ = Die area (mm²) - $A_{die} = L_{die} \times W_{die}$ - $A_{scribe}$ = Scribe lane area per die (mm²) - $U$ = Utilization factor - Typical range: $0.75 \leq U \leq 0.95$ ### 2.2 Edge Loss Correction (Gross Die Formula) Accounts for partial dies at wafer edge: $$ N_{gross} = \frac{\pi \cdot r^2}{A_{die}} - \frac{\pi \cdot D_{wafer}}{\sqrt{2} \cdot S_{die}} $$ **Where:** - $r$ = Wafer radius (mm) - $S_{die}$ = Die size (characteristic dimension) ### 2.3 Rectangular Die Packing For rectangular dies on circular wafer: $$ N_{dies} = \left\lfloor \frac{D_{eff}}{L + k_x} \right\rfloor \times \left\lfloor \frac{D_{eff}}{W + k_y} \right\rfloor $$ **Where:** - $D_{eff}$ = Effective wafer diameter after edge exclusion - $L, W$ = Die length and width - $k_x, k_y$ = Kerf widths in x and y directions - $\lfloor \cdot \rfloor$ = Floor function ### 2.4 Die Yield Models #### 2.4.1 Poisson Yield Model (Simple) $$ Y = e^{-D_0 \cdot A_{die}} $$ **Where:** - $Y$ = Yield (fraction of good dies) - $D_0$ = Defect density (defects/cm²) - $A_{die}$ = Die area (cm²) #### 2.4.2 Murphy's Yield Model $$ Y = \left( \frac{1 - e^{-D_0 \cdot A_{die}}}{D_0 \cdot A_{die}} \right)^2 $$ #### 2.4.3 Seeds Yield Model $$ Y = e^{-\sqrt{D_0 \cdot A_{die}}} $$ #### 2.4.4 Comprehensive Die Yield Formula $$ Y = \left( \frac{W_a}{S + 2\sqrt{A \cdot D}} \right)^2 \cdot e^{-\pi \cdot D \cdot \frac{D}{A}} $$ **Where:** - $W_a$ = Wafer area - $S$ = Chip size - $A$ = Chip area - $D$ = Defect density ## 3. Mechanical Blade Dicing Models ### 3.1 Street Width Capability $$ W_{street} = P + K + n \cdot \sigma $$ **Where:** - $W_{street}$ = Minimum street width required - $P$ = Cut placement accuracy factor - $K$ = Kerf width factor - $n$ = Process capability factor (typically 3 for 3σ) - $\sigma$ = Standard deviation of cut position ### 3.2 Kerf Width Calculation $$ K_{eff} = K_{blade} + 2 \cdot \delta_{wear} + \delta_{runout} $$ **Where:** - $K_{eff}$ = Effective kerf width - $K_{blade}$ = Nominal blade thickness - $\delta_{wear}$ = Blade wear contribution - $\delta_{runout}$ = Spindle runout contribution ### 3.3 Maximum Undeformed Chip Thickness For grinding/dicing processes: $$ h_{max} = \left( \frac{4 \cdot v_f}{v_s \cdot C \cdot r} \right)^{1/2} \cdot \left( \frac{a_p}{d_s} \right)^{1/4} $$ **Where:** - $h_{max}$ = Maximum undeformed chip thickness - $v_f$ = Feed rate (mm/s) - $v_s$ = Blade surface velocity (m/s) - $C$ = Active cutting point density - $r$ = Chip width-to-thickness ratio - $a_p$ = Depth of cut - $d_s$ = Blade diameter **Optimal range for damage-free cutting:** $$ 10 \text{ nm} \leq h_{max} \leq 30 \text{ nm} $$ ### 3.4 Cutting Force Model #### 3.4.1 Total Cutting Force $$ \vec{F}_{total} = \vec{F}_t + \vec{F}_n + \vec{F}_f $$ **Where:** - $\vec{F}_t$ = Tangential cutting force - $\vec{F}_n$ = Normal force - $\vec{F}_f$ = Friction force #### 3.4.2 Tangential Force Component $$ F_t = K_s \cdot A_c = K_s \cdot a_p \cdot f $$ **Where:** - $K_s$ = Specific cutting force (N/mm²) - $A_c$ = Chip cross-sectional area - $a_p$ = Depth of cut - $f$ = Feed per revolution #### 3.4.3 Spindle Torque $$ T = F_t \cdot \frac{d_s}{2} $$ ### 3.5 Material Removal Rate (MRR) $$ \text{MRR} = v_f \cdot a_p \cdot K_{eff} $$ **Units:** mm³/s ### 3.6 Blade Wear Model $$ \frac{dV_w}{dL} = K_w \cdot \frac{F_n}{H_b} $$ **Where:** - $V_w$ = Blade wear volume - $L$ = Cutting length - $K_w$ = Wear coefficient - $F_n$ = Normal force - $H_b$ = Blade hardness ## 4. Chipping and Fracture Mechanics Models ### 4.1 Linear Elastic Fracture Mechanics (LEFM) #### 4.1.1 Stress Intensity Factor (Mode I) $$ K_I = \sigma \sqrt{\pi a} \cdot f\left(\frac{a}{W}\right) $$ **Where:** - $K_I$ = Mode I stress intensity factor (MPa$\cdot$√m) - $\sigma$ = Applied stress - $a$ = Crack length - $W$ = Specimen width - $f(a/W)$ = Geometry correction factor #### 4.1.2 Fracture Criterion Fracture occurs when: $$ K_I \geq K_{IC} $$ **Silicon fracture toughness values:** | Plane | $K_{IC}$ (MPa$\cdot$√m) | |-------|-------------------| | {111} | 0.82 | | {110} | 0.90 | | {100} | 0.95 | ### 4.2 Critical Crack Length for Backside Chipping Based on single edge cracked pure bending: $$ K_C = \frac{6M}{bh^2} \sqrt{\pi a_c} \cdot Y(\alpha) $$ **Where:** - $\alpha = \frac{a_c}{h}$ - For $a_c \ll h$: $Y(\alpha) \approx 1.122$ **Solving for critical crack length:** $$ a_c = \frac{1}{\pi} \left( \frac{K_C \cdot b}{6M_x \cdot Y} \right)^2 \cdot h^4 $$ **With uniform loading:** $$ M_x = \frac{q \cdot l^2}{2} $$ ### 4.3 Chipping Mode Classification Based on crystallographic orientation of silicon: | Mode | Angle | Mechanism | |------|-------|-----------| | Type 1 | 30° | Radial crack along ⟨110⟩ meets {111} cleavage | | Type 2 | 60° | Radial crack intersection | | Type 3 | 90° | Perpendicular radial crack | | Type 4 | Irregular | Multiple crack interactions | ### 4.4 Chipping Size Prediction $$ C_{size} = k \cdot \left( \frac{F_n}{H} \right)^{2/3} \cdot \left( \frac{E}{K_{IC}} \right)^{1/2} $$ **Where:** - $C_{size}$ = Chipping size - $F_n$ = Normal force - $H$ = Material hardness - $E$ = Young's modulus - $K_{IC}$ = Fracture toughness ### 4.5 Die Strength (Three-Point Bending) $$ \sigma_{break} = \frac{3 \cdot F \cdot L}{2 \cdot b \cdot t^2} $$ **Where:** - $\sigma_{break}$ = Breaking strength (MPa) - $F$ = Applied force at fracture - $L$ = Support span - $b$ = Die width - $t$ = Die thickness ### 4.6 Weibull Distribution for Die Strength $$ P_f(\sigma) = 1 - \exp\left[ -\left( \frac{\sigma}{\sigma_0} \right)^m \right] $$ **Where:** - $P_f$ = Probability of failure - $\sigma_0$ = Characteristic strength - $m$ = Weibull modulus (shape parameter) ## 5. Laser Dicing Mathematical Models ### 5.1 Laser Beam Fundamentals #### 5.1.1 Gaussian Beam Intensity Profile $$ I(r) = I_0 \cdot \exp\left( -\frac{2r^2}{w^2} \right) $$ **Where:** - $I_0$ = Peak intensity at beam center - $r$ = Radial distance from center - $w$ = Beam radius (1/e² point) #### 5.1.2 Peak Fluence $$ F_0 = \frac{2 \cdot E_p}{\pi \cdot w_0^2} $$ **Where:** - $F_0$ = Peak fluence (J/cm²) - $E_p$ = Pulse energy (J) - $w_0$ = Beam waist radius ### 5.2 Thermal Diffusion Model #### 5.2.1 Thermal Diffusion Length $$ L_{th} = \sqrt{D_{th} \cdot t_p} $$ **Where:** - $L_{th}$ = Thermal diffusion length - $D_{th}$ = Thermal diffusivity - Silicon: $D_{th} \approx 0.8$ cm²/s - $t_p$ = Pulse duration #### 5.2.2 Heat Penetration Depth $$ \delta_{th} = 2\sqrt{D_{th} \cdot t_p} $$ ### 5.3 Ablation Threshold #### 5.3.1 Single-Shot Ablation Threshold $$ F_{th} = \frac{\rho \cdot C_p \cdot (T_m - T_0) + \rho \cdot L_m}{\alpha \cdot (1-R)} $$ **Where:** - $\rho$ = Density - $C_p$ = Specific heat capacity - $T_m$ = Melting temperature - $T_0$ = Initial temperature - $L_m$ = Latent heat of melting - $\alpha$ = Absorption coefficient - $R$ = Reflectivity #### 5.3.2 Multi-Pulse Incubation Effect $$ F_{th}(N) = F_{th}(1) \cdot N^{S-1} $$ **Where:** - $N$ = Number of pulses - $S$ = Incubation coefficient ($S < 1$ for incubation) ### 5.4 Ablation Depth Model #### 5.4.1 Logarithmic Ablation Law $$ d = \frac{1}{\alpha_{eff}} \ln\left( \frac{F_0}{F_{th}} \right) $$ **Where:** - $d$ = Ablation depth per pulse - $\alpha_{eff}$ = Effective absorption coefficient #### 5.4.2 Total Ablation Depth $$ D_{total} = N_{eff} \cdot d = \frac{N_{eff}}{\alpha_{eff}} \ln\left( \frac{F_0}{F_{th}} \right) $$ ### 5.5 Heat-Affected Zone (HAZ) Model #### 5.5.1 HAZ Definition Criterion $$ \text{HAZ}: \quad T_{max}(r,z) \geq T_{melt} $$ For silicon: $T_{melt} = 1685$ K #### 5.5.2 HAZ Width vs Pulse Duration Empirical relationship: $$ W_{HAZ} \approx k \cdot t_p^{0.4} $$ | Pulse Duration | HAZ Width | |----------------|-----------| | 1 ns | ~0.3 $\mu$m | | 50 ns | ~1.0 $\mu$m | | 200 ns | ~1.7 $\mu$m | ### 5.6 Net Fluence (Accumulated Energy) $$ F_{net} = \frac{P_{avg}}{v_{scan} \cdot w_0} \cdot N_{passes} $$ **Where:** - $P_{avg}$ = Average laser power - $v_{scan}$ = Scanning velocity - $w_0$ = Beam waist - $N_{passes}$ = Number of scan passes ### 5.7 Pulse Overlap #### 5.7.1 Spatial Overlap $$ O_s = 1 - \frac{v_{scan}}{f_{rep} \cdot 2w_0} $$ **Where:** - $O_s$ = Spatial overlap (0 to 1) - $f_{rep}$ = Pulse repetition rate #### 5.7.2 Effective Pulse Number $$ N_{eff} = \frac{f_{rep} \cdot 2w_0}{v_{scan}} $$ ### 5.8 Die Breaking Strength Correlation $$ \sigma_{break} = A - B \cdot \ln(F_{net}) $$ **Where:** - $A, B$ = Material-dependent constants - Higher $F_{net}$ → Lower breaking strength due to HAZ ## 6. Stealth Dicing Mathematical Framework ### 6.1 Principle Overview Stealth dicing uses IR laser focused inside silicon to create internal modified layers without surface damage. **Key physics:** - Two-photon absorption (TPA) - Temperature-dependent absorption coefficient - Internal stress generation - Controlled crack propagation ### 6.2 Nonlinear Absorption Model #### 6.2.1 Two-Photon Absorption $$ \frac{dI}{dz} = -\alpha I - \beta I^2 $$ **Where:** - $\alpha$ = Linear absorption coefficient - $\beta$ = Two-photon absorption coefficient - $I$ = Intensity #### 6.2.2 Temperature-Dependent Absorption $$ \alpha(T) = \alpha_0 \cdot \exp\left( \frac{T - T_0}{T_c} \right) $$ **Where:** - $\alpha_0$ = Absorption coefficient at reference temperature - $T_c$ = Characteristic temperature **Critical relationship:** As temperature increases, silicon's bandgap shrinks: $$ E_g(T) = E_g(0) - \frac{\alpha_{SV} \cdot T^2}{T + \beta_{SV}} $$ ### 6.3 Modified Layer Formation #### 6.3.1 Energy Density in Modified Region $$ E_v = \frac{E_p \cdot \eta}{V_{mod}} $$ **Where:** - $E_v$ = Volumetric energy density (kJ/cm³) - $E_p$ = Pulse energy - $\eta$ = Absorption efficiency - $V_{mod}$ = Modified volume **Typical range:** $0.5 \leq E_v \leq 4.6$ kJ/cm³ #### 6.3.2 Modified Layer Dimensions $$ L_{mod} = f(E_p, z_f, NA) $$ **Where:** - $L_{mod}$ = Modified layer length - $E_p$ = Pulse energy - $z_f$ = Focal depth - $NA$ = Numerical aperture ### 6.4 Pulse Number per Spot $$ N = \frac{f_{rep} \cdot S}{v_{scan}} $$ **Where:** - $N$ = Number of pulses per spot - $f_{rep}$ = Repetition rate - $S$ = Focal spot size - $v_{scan}$ = Scanning speed ### 6.5 Heat Conduction Model #### 6.5.1 3D Heat Equation $$ \rho C_p \frac{\partial T}{\partial t} = k \nabla^2 T + Q(x,y,z,t) $$ **Where:** - $Q$ = Volumetric heat source from laser absorption #### 6.5.2 Gaussian Heat Source $$ Q(r,z,t) = \frac{\alpha P}{\pi w^2} \exp\left( -\frac{2r^2}{w^2} \right) \exp(-\alpha z) \cdot g(t) $$ ### 6.6 Thermal Stress Model #### 6.6.1 Thermoelastic Stress $$ \sigma_{th} = \frac{E \alpha_{th} \Delta T}{1 - \nu} $$ **Where:** - $E$ = Young's modulus - $\alpha_{th}$ = Thermal expansion coefficient - $\nu$ = Poisson's ratio - $\Delta T$ = Temperature change #### 6.6.2 Stress Intensity Factor from Modified Layer $$ K_I = \sigma_{th} \sqrt{\pi a_{mod}} \cdot f(geometry) $$ ### 6.7 Crack Propagation Criterion Crack propagates when: $$ K_I \geq K_{IC} $$ **Crack propagation direction** follows maximum tangential stress criterion: $$ \theta_c = 2 \arctan\left( \frac{1}{4} \left[ \frac{K_I}{K_{II}} - \text{sign}(K_{II})\sqrt{\left(\frac{K_I}{K_{II}}\right)^2 + 8} \right] \right) $$ ## 7. Plasma Dicing (DRIE/Bosch Process) Models ### 7.1 Bosch Process Overview Three-step cyclic process: 1. **Passivation deposition** (C₄F₈) 2. **Bottom film etching** (SF₆ + ion bombardment) 3. **Silicon etching** (SF₆ radicals) ### 7.2 Etch Rate Fundamentals #### 7.2.1 Chemical Etch Rate $$ R_{chem} = k_0 \cdot [F^*] \cdot \exp\left( -\frac{E_a}{k_B T} \right) $$ **Where:** - $k_0$ = Pre-exponential factor - $[F^*]$ = Fluorine radical concentration - $E_a$ = Activation energy - $k_B$ = Boltzmann constant - $T$ = Surface temperature #### 7.2.2 Ion-Enhanced Etch Rate $$ R_{total} = R_{chem} + R_{ion} = R_{chem} \cdot (1 + \gamma \cdot \Gamma_i \cdot \sqrt{E_i}) $$ **Where:** - $\gamma$ = Ion enhancement factor - $\Gamma_i$ = Ion flux - $E_i$ = Ion energy ### 7.3 Loading Effect Model $$ R(A_{open}) = R_0 \cdot \left( 1 + \frac{A_{open}}{A_{ref}} \right)^{-n} $$ **Where:** - $R_0$ = Baseline etch rate - $A_{open}$ = Open area (exposed silicon) - $A_{ref}$ = Reference area - $n$ = Loading effect exponent ### 7.4 Aspect Ratio Dependent Etching (ARDE) #### 7.4.1 Knudsen Transport Model $$ \frac{R(AR)}{R_0} = \frac{1}{1 + \frac{AR}{AR_{crit}}} $$ **Where:** - $AR$ = Aspect ratio = depth/width - $AR_{crit}$ = Critical aspect ratio #### 7.4.2 RIE Lag $$ \Delta d = d_0 \cdot \left( 1 - \frac{w_{narrow}}{w_{wide}} \right)^{\beta} $$ **Where:** - $\Delta d$ = Depth difference - $w_{narrow}, w_{wide}$ = Feature widths - $\beta$ = Lag exponent ### 7.5 Selectivity $$ S = \frac{R_{Si}}{R_{mask}} $$ **Typical values:** | Mask Material | Selectivity | |---------------|-------------| | Photoresist | 50-100:1 | | SiO₂ | 100-200:1 | | Al | >200:1 | ### 7.6 Scallop Formation Model Scallop depth per cycle: $$ \delta_{scallop} = R_{Si} \cdot t_{etch} - R_{pass} \cdot t_{pass} $$ **Where:** - $t_{etch}$ = Etch step duration - $t_{pass}$ = Passivation step duration **Scallop pitch:** $$ p_{scallop} = R_{vertical} \cdot (t_{etch} + t_{pass}) $$ ### 7.7 Sidewall Angle $$ \theta = 90° - \arctan\left( \frac{R_{lateral}}{R_{vertical}} \right) $$ **Process control:** - Increase passivation → More vertical (closer to 90°) - Increase etch time → More tapered ### 7.8 Etch Depth Calculation $$ d_{total} = N_{cycles} \cdot d_{cycle} $$ **Where:** - $N_{cycles}$ = Number of Bosch cycles - $d_{cycle}$ = Depth per cycle (typically 0.5-5 $\mu$m) ## 8. Process Comparison ### 8.1 Key Performance Metrics | Parameter | Blade Dicing | Laser Ablation | Stealth Dicing | Plasma Dicing | |-----------|--------------|----------------|----------------|---------------| | **Kerf Width** | 20-100 $\mu$m | 10-30 $\mu$m | ~0 $\mu$m | <10 $\mu$m | | **Die Strength** | Lower | Medium | High | Highest | | **Throughput** | Medium | High | High | Variable | | **HAZ** | Minimal | Present | Internal only | None | | **Debris** | Yes (wet) | Yes | No | No | | **Process** | Wet | Dry | Dry | Dry | ### 8.2 Die Count Advantage (Plasma vs Blade) $$ \Delta N = \frac{\pi D^2}{4} \cdot \left( \frac{1}{(s+k_p)^2} - \frac{1}{(s+k_b)^2} \right) $$ **Where:** - $k_p$ = Plasma kerf (~5 $\mu$m) - $k_b$ = Blade kerf (~50 $\mu$m) - $s$ = Die size ### 8.3 Cost Model $$ C_{total} = C_{equipment} + C_{consumables} + C_{yield\_loss} $$ **Where:** $$ C_{yield\_loss} = (1 - Y) \cdot N_{dies} \cdot C_{die} $$ ## 9. Advanced Modeling Considerations ### 9.1 AI-Based Process Optimization Machine learning models for process optimization: $$ \vec{y} = f_{ML}(\vec{x}; \vec{\theta}) $$ **Where:** - $\vec{x}$ = Input parameters (speed, power, pressure, etc.) - $\vec{y}$ = Output metrics (kerf, chipping, die strength) - $\vec{\theta}$ = Model parameters ### 9.2 Finite Element Analysis (FEA) #### 9.2.1 Governing Equations **Mechanical equilibrium:** $$ \nabla \cdot \boldsymbol{\sigma} + \vec{f} = \rho \frac{\partial^2 \vec{u}}{\partial t^2} $$ **Thermal diffusion:** $$ \rho C_p \frac{\partial T}{\partial t} = \nabla \cdot (k \nabla T) + Q $$ #### 9.2.2 Coupled Thermo-Mechanical $$ \boldsymbol{\sigma} = \mathbf{C} : (\boldsymbol{\varepsilon} - \boldsymbol{\varepsilon}_{th}) $$ **Where:** $$ \boldsymbol{\varepsilon}_{th} = \alpha_{th} (T - T_{ref}) \mathbf{I} $$ ### 9.3 Extended Finite Element Method (XFEM) For crack propagation modeling: $$ u^h(\vec{x}) = \sum_i N_i(\vec{x}) u_i + \sum_j N_j(\vec{x}) H(\vec{x}) a_j + \sum_k N_k(\vec{x}) \sum_{l=1}^{4} F_l(\vec{x}) b_k^l $$ **Where:** - $H(\vec{x})$ = Heaviside enrichment function - $F_l(\vec{x})$ = Crack tip enrichment functions ### 9.4 Hybrid Dicing Optimization Objective function: $$ \min_{\vec{p}} \left[ w_1 \cdot C_{chipping} + w_2 \cdot C_{HAZ} + w_3 \cdot C_{time} \right] $$ Subject to constraints: - $K_{eff} \leq K_{max}$ - $\sigma_{break} \geq \sigma_{min}$ - $C_{chip} \leq C_{max}$ ## 10. Key Equations ### 10.1 Yield and Geometry | Model | Equation | |-------|----------| | Dies per Wafer | $\text{DPW} = \frac{\pi (D/2)^2}{A_{die} + A_{scribe}} \times U$ | | Poisson Yield | $Y = e^{-D_0 \cdot A}$ | | Murphy Yield | $Y = \left( \frac{1 - e^{-DA}}{DA} \right)^2$ | ### 10.2 Mechanical Dicing | Model | Equation | |-------|----------| | Kerf Width | $K_{eff} = K_{blade} + 2\delta_{wear} + \delta_{runout}$ | | Cutting Force | $F_t = K_s \cdot a_p \cdot f$ | | MRR | $\text{MRR} = v_f \cdot a_p \cdot K_{eff}$ | ### 10.3 Fracture Mechanics | Model | Equation | |-------|----------| | Stress Intensity Factor | $K_I = \sigma \sqrt{\pi a} \cdot f(a/W)$ | | Critical Crack Length | $a_c = \frac{1}{\pi} \left( \frac{K_C b}{6MY} \right)^2 h^4$ | | Die Strength | $\sigma_{break} = \frac{3FL}{2bt^2}$ | ### 10.4 Laser Processing | Model | Equation | |-------|----------| | Peak Fluence | $F_0 = \frac{2E_p}{\pi w_0^2}$ | | Thermal Diffusion Length | $L_{th} = \sqrt{D_{th} \cdot t_p}$ | | Ablation Depth | $d = \frac{1}{\alpha_{eff}} \ln\left(\frac{F_0}{F_{th}}\right)$ | | Net Fluence | $F_{net} = \frac{P_{avg}}{v_{scan} \cdot w_0} \cdot N_{passes}$ | ### 10.5 Plasma Dicing | Model | Equation | |-------|----------| | Etch Rate | $R = k_0 [F^*] \exp(-E_a/k_BT)$ | | ARDE | $R(AR)/R_0 = 1/(1 + AR/AR_{crit})$ | | Selectivity | $S = R_{Si}/R_{mask}$ | ### Material Properties (Silicon) | Property | Value | Units | |----------|-------|-------| | Young's Modulus (⟨100⟩) | 130 | GPa | | Young's Modulus (⟨111⟩) | 188 | GPa | | Fracture Toughness {111} | 0.82 | MPa$\cdot$√m | | Thermal Conductivity | 149 | W/(m$\cdot$K) | | Thermal Diffusivity | 0.8 | cm²/s | | Melting Point | 1685 | K | | Density | 2330 | kg/m³ | ## Notation Summary | Symbol | Description | Units | |--------|-------------|-------| | $D$ | Wafer diameter | mm | | $A$ | Area | mm² | | $K$ | Kerf width | $\mu$m | | $v_f$ | Feed rate | mm/s | | $v_s$ | Blade velocity | m/s | | $F$ | Force | N | | $\sigma$ | Stress | MPa | | $K_I$ | Stress intensity factor | MPa$\cdot$√m | | $K_{IC}$ | Fracture toughness | MPa$\cdot$√m | | $E_p$ | Pulse energy | J | | $F_0$ | Peak fluence | J/cm² | | $t_p$ | Pulse duration | ns, ps, fs | | $R$ | Etch rate | $\mu$m/min | | $Y$ | Yield | fraction |
Semiconductor manufacturing facility where silicon wafers are processed into chips.
Wafer flats are ground edges indicating crystal orientation on older wafers.
Manage fragile thinned wafers.
Wafer identification assigns unique identifiers to wafers for tracking through manufacturing.
Unique identifier laser-marked or RFID-tagged on each wafer.
Analyze pass/fail patterns.
SPC for spatial patterns.
Wafer map visualization displays spatial test results using color-coded die locations revealing systematic defects.
Wafer maps spatially display test results across die revealing systematic defects clustered failures and process gradients.
Visual representation of die pass/fail.
Wafer mapping visualizes spatial test results identifying yield patterns and systematic defects.
Wafer notches are V-shaped cuts indicating crystal orientation.
Crystallographic direction.
Cost charged by foundry per processed wafer.
Electrical test of dies on wafer before dicing.
Wafer sorters automatically classify and route wafers based on test results.
Classify wafers or dies by electrical test results.
Number of wafers entering production.
Measure mechanical stress in wafers using Raman or XRD.
Pre-treatment before critical process steps.
Wafer test data includes parametric electrical measurements and spatial coordinates used for yield analysis and defect detection.
Non-uniformity in wafer thickness across the wafer.
Reduce wafer thickness.
Reduce wafer thickness for 3D integration or packaging.
Bowing or distortion of wafer from stress or temperature.
CSP fabricated at wafer level.
Predict across-wafer variations.
Package at wafer level.
Approaches to testing dies on wafer.
Entire silicon wafer as single chip (Cerebras).