Bicmos Logic 1980s Count the Extra Masking Steps the Merged Flow Adds

# BiCMOS Logic (Late 1980s): Step 5 — Count the Extra Masking Steps the Merged Flow Adds

## 1. Every New Diffusion Needs Its Own Mask

Step 4's three added diffusions — deep collector, base, emitter — are each defined by their own photolithographic masking step: a layer of resist patterned, exposed, developed, and used to selectively implant or diffuse dopant into only the regions that need it, exactly the masking discipline the `photolithography` series covers in general. A pure CMOS flow of this era typically runs on the order of twelve to sixteen mask levels; a merged BiCMOS flow commonly adds somewhere between four and seven additional mask levels specifically for the bipolar device — collector, base, emitter, and often a dedicated isolation or guard structure around the bipolar region to keep its higher operating currents from injecting minority carriers into the neighboring CMOS wells.

## 2. Why This Cost Cannot Be Hidden or Amortized Away

Each additional mask level adds its own alignment tolerance, its own yield-limiting defect opportunity, and its own pass through the fab's lithography and implant tools — real wafer-processing time and real cost per wafer, independent of how many of the added bipolar devices actually get used in the final design. This is the central economic fact that governs every later step in this series: BiCMOS is not a free upgrade to CMOS, it is a process with a fixed per-wafer cost premium that has to be earned back by the specific performance gain the bipolar output stages deliver at the nodes where they are actually placed — a cost that Step 16 returns to quantify directly.

## 3. Companion Diagram One: Quantitative View

Mask Count: Pure CMOS vs Merged BiCMOS mask levels required, representative late-1980s process pure CMOS — baseline mask count BiCMOS — baseline plus bipolar-specific masks the added masks are the process's fixed cost twelve to sixteen levels, typical adds four to seven levels for collector/base/emitter/isolation every added mask level is wafer time and yield risk, used or not the cost is paid on every wafer regardless of how much bipolar is actually used

## 4. Companion Diagram Two: Structural View

What Each Added Mask Actually Defines the bipolar-specific masking sequence inserted into the CMOS flow COLLECTOR MASK defines/deepens the shared n-well region BASE MASK sets base depth, dose, and lateral extent EMITTER + ISOLATION self-aligned emitter, guard ring against injection four discrete mask levels, each with its own alignment and yield risk

Take bicmos logic 1980s count the extra masking steps the merged flow adds further

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