DRAM 1968 Build Storage Capacitor Beside Access Transistor

# Build the Storage Capacitor Beside the Transistor: Turn the MOS Capacitor from a Test Structure into the Bit Itself

## 1. Reuse the Gate-Oxide-Silicon Stack for a Completely Different Purpose

The MOS capacitor that 1962's Step 6 used to reveal accumulation, depletion, and inversion now becomes a functional storage element beside the access transistor. Its physical ingredients are already familiar: a conductive electrode, a thin insulating oxide, and semiconductor or conductive material forming the opposing electrode. In the earlier series, engineers swept the electrode voltage and measured capacitance to diagnose the silicon surface. In Dennard's cell, the same ability to separate charge across an insulator is no longer a measurement aid—the separated charge is the bit.

The storage node created in Step 3 connects one side of this capacitor to the access transistor. The other side is held at a defined plate potential. When the word line selects the transistor, the bit line changes the storage-node voltage; when the word line turns the transistor off, the dielectric prevents direct conduction across the capacitor and the node retains charge temporarily.

$$C_s=\frac{\varepsilon_{ox}A}{t_{ox}}, \qquad Q_s=C_s\left(V_s-V_p\right)$$

where $A$ is effective capacitor area, $t_{ox}$ is dielectric thickness, $\varepsilon_{ox}$ is dielectric permittivity, $V_s$ is the storage-node voltage, and $V_p$ is the plate voltage. The geometry sets how much capacitance fits beside each transistor; the applied voltage determines how much charge that capacitance stores.

One Cell Cross-Section: Access Transistor Beside Its Storage Capacitor a familiar MOS layer stack is connected to the storage-node diffusion silicon substrate bit-line diffusion storage-node diffusion WORD LINE poly gate access transistor storage-node connection STORAGE ELECTRODE oxide dielectric PLATE ELECTRODE V_p the transistor grants access; the dielectric-separated electrodes hold Q_s unlike the gate capacitor, this dedicated capacitor's stored charge is the cell's information

## 2. Capacitance Is the Cell's Charge Budget

The capacitor cannot be treated as a generic symbol. Its area, dielectric thickness, and permittivity set the cell's entire charge budget. Increasing area or permittivity raises $C_s$; thinning the dielectric also raises $C_s$, but only until breakdown, tunneling, and manufacturing uniformity make further thinning unacceptable. Because $Q_s=C_s(V_s-V_p)$, every reduction in capacitance at the same operating voltage reduces the physical separation between the two stored states.

Geometry Sets Capacitance; Capacitance Sets Stored Charge the physical design chain that turns a MOS stack into a readable bit PHYSICAL GEOMETRY electrode area A dielectric t_ox, ε_ox plate electrode C_s = ε_ox A / t_ox larger A or ε raises C_s smaller t raises C_s ELECTRICAL CAPACITY Q_s = C_s(V_s − V_p) capacitance determines how much charge represents each state BIT SEPARATION STATE A Q_A STATE B Q_B ΔQ must remain resolvable area and oxide geometry → C_s → stored Q_s → separation between the two bit states

## 3. The Test Structure Becomes a Repeated Functional Device

In 1962, a large MOS capacitor could be placed beside experimental transistors, contacted by instruments, and used to reveal whether the oxide-silicon interface behaved correctly. It did not need to fit once per bit, connect to a selectable array node, or preserve a useful signal after the measuring apparatus was removed. Step 4 changes all three conditions. The capacitor must now be compact enough to repeat throughout an array, directly connected to the transistor's storage-side diffusion, and large enough electrically to preserve distinguishable charge states.

That is why this step is more than drawing a capacitor symbol beside a MOSFET. It converts an already understood physical stack into a manufactured information-bearing component. The access transistor provides selection but does not provide persistence; the capacitor provides persistence but cannot select itself. Only their connection creates the one-transistor, one-capacitor cell.

The completed structure now has every physical component required to store a bit: a word-line-controlled transistor, a shared bit-line connection, a storage node, and a dielectric-separated capacitor tied to a plate reference. It is not yet a reliable memory, because neither the off transistor nor the capacitor dielectric is perfectly insulating. Step 5 confronts that unavoidable leakage and explains why the charge does not stay forever.

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