fan-out wafer-level packaging
Fan-out wafer-level packaging, or FOWLP, is a chip packaging method that embeds individual dies in a reconstituted mold compound and builds redistribution wiring extending beyond the die's original footprint, allowing more connections and thinner packages than traditional approaches confined to the die's own area.
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{ "type": "nodes", "items": [
{ "title": "Traditional packaging confines connections to the die area", "sub": "limited room for connections as I/O counts grow", "tone": "neutral" }
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{ "type": "arrow" },
{ "type": "group", "title": "Die embedded in mold compound, wiring fans out beyond it", "items": [
{ "title": "Redistribution layer extends connections past die edges", "sub": "far more usable area for connections than the die alone", "tone": "blue" }
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```
**FOWLP exists because traditional packaging approaches that confine all connections to directly above the die's own footprint run into real space constraints as chips need more and more input/output connections without growing the die itself.** Since simply making the die larger just to fit more connections isn't always practical or cost-effective, fan-out packaging instead embeds the die in a reconstituted mold compound and builds redistribution wiring that extends, or fans out, beyond the die's original edges, creating substantially more usable area for connections than the die's own footprint would otherwise allow, all while keeping the overall package notably thin.
```svg
```
```svg
```
| Aspect | Traditional die-confined packaging | Fan-out wafer-level packaging |
|---|---|---|
| Connection area | Limited to die footprint | Extends beyond die footprint |
| Package thickness | Typically thicker | Typically thinner |
| Achievable I/O count | Limited by die size | Higher, independent of die size |
| Common use | Simpler, lower-I/O chips | High-I/O, thin-form-factor chips |
**FOWLP processing works at the wafer or panel level rather than on individual pre-packaged units, since building the redistribution wiring across many embedded dies together is more efficient than doing so one package at a time.** Because the reconstituted mold compound containing many individual dies is processed together as a single larger wafer or panel, building redistribution wiring across all the embedded dies at once, FOWLP achieves manufacturing efficiencies compared to approaches that would need to build similar wiring on each individual package separately.
**FOWLP can support multiple dies within a single reconstituted package, not just one, making it a useful approach for combining several chips into one compact multi-die package.** Because the mold compound reconstitution step can embed more than one die at a time, fan-out packaging is also used to combine multiple separate dies into a single package, with the redistribution wiring handling connections both within and beyond the combined die footprint.
**FOWLP eliminates the need for a traditional package substrate in many designs, since the redistribution wiring layer itself can take on the substrate's usual interconnect role.** Because the fan-out redistribution layer can directly provide the wiring that a traditional substrate would otherwise supply, some FOWLP designs skip a separate substrate layer entirely, contributing to the thinner overall package profile that fan-out approaches are known for.
Read fan-out wafer-level packaging through a spread-out-desk lens: rather than confining all your paperwork to exactly the footprint of a small desk, spreading it out onto a larger surrounding surface gives you far more room to organize and connect things, without needing a bigger desk in the first place.