1,623 technical terms and definitions
amba axi, axi4, axi4 lite, axi stream, ace, chi, valid ready handshake, on chip bus
AXI protocol is the AMBA Advanced eXtensible Interface family used to connect masters, interconnects and slaves in many SoCs. Its independent channels, bursts, outstanding…
agile hardware, scrum, kanban, sprint, iterative development
agile development is an iterative product-development approach that delivers small working increments, learns from feedback, and adapts plans while maintaining technical quality.…
flops, training compute, model flops utilization, compute budget
Compute, in AI, means floating-point operations — FLOPs — the raw arithmetic a training run or inference request actually consumes, and it functions as the field's basic unit…
machine intelligence, ai, ai systems, data analytics, machine learning
artificial intelligence is the broad field of building machines that perceive, reason, learn, generate, plan, and act toward goals. AI spans symbolic systems, machine learning…
AA etch, ACT etch, diagonal active line, 6F2 cell layout, SAQP active line transfer
The active area etch — AA Etch or ACT Etch — cuts the diagonal lines of silicon that will eventually become every transistor's channel in the DRAM array, and the lines run…
sacrificial oxide removal, bitline parasitic capacitance reduction, DRAM air gap isolation, selective wet etch bitline
Air-gap spacer removal does the opposite of almost every other spacer step in this flow — instead of depositing and shaping a material that stays in the finished chip, it…
key open etch, mark open, overlay mark, scanner alignment, DRAM lithography overlay
The alignment key open — called Key Open or Mark Open — clears a small, dedicated area of the wafer, usually outside the active cell array entirely, so the overlay and alignment…
mostek mk4096, dram4k 1973
Analyze Yield Economics at 4K Density Quadrupling the number of memory cells on a comparable die made the 4K generation more sensitive to any single defect, since a flaw in one…
first commercial mos linear ics step 8 overview, a crowded field the other new entrants in early pmos process
A Crowded Field: the Other New Entrants in Early PMOS Process Work 1. More Than Two Companies General Microelectronics and Electronic Arrays were the first movers, but by the late…
ALD self-limiting reactions conformality, high-k dielectrics HfO2 Al2O3, ALD precursor chemistry TMA, area-selective ALD advanced nodes
Atomic Layer Deposition (ALD): Precision Nanometer-Scale Film Growth and Integration in Advanced Semiconductor Manufacturing Executive Overview Atomic layer deposition (ALD)…
grown junction 1951 age or stabilize, burn in acceleration factor arrhenius, bathtub curve infant mortality screening, grown junction transistor conditioning period
Age or Stabilize the Device: Compressing Years Into Hours on Purpose Step twenty-eight's leakage-drift curve and step thirty-four's enclosure comparison both described failure…
grown junction 1951 attach bar ends, solder thermal budget junction diffusion, cumulative thermal budget dopant diffusion, grown junction transistor solder joint
Attach the Two Bar Ends: Soldering Without Re-Grading a Junction Already Grown Sharp Every junction in this bar was already formed, with whatever sharpness the melt-mixing…
hybrid attention-ssm, hybrid attention ssm, attention state space hybrid, attention-ssm hybrid, jamba, zamba, samba, hybrid transformer-ssm
Mamba-2 is the 2024 successor to the Mamba selective state-space model, and its importance is less about a bigger benchmark number than about a unifying idea: it shows that…
analog in memory compute, analog cim, compute in memory, resistive crossbar
Analog in-memory compute is a compute-in-memory approach that uses physical array currents or charges to perform approximate matrix operations where weights are stored. Analog IMC…
ald kinetics, atomic layer deposition kinetics, ald growth per cycle, PEALD plasma enhanced atomic layer deposition conformal films, ald, atomic layer deposition
Atomic Layer Deposition is the vapor-phase thin film synthesis technique based on sequential, self-limiting gas-surface chemical reactions that achieves digital monolayer…
power mosfet igbt step 6 positive temperature coefficient power mosfet safe operating area, positive temperature coefficient power mosfet safe operating area
Avoid Second Breakdown Through Positive Temperature Coefficient 6. Avoid Second Breakdown Through Positive Temperature Coefficient Unlike the bipolar transistor's current-crowding…
ald kinetics, atomic layer deposition kinetics, ald growth per cycle, semiconductor ald atomic layer deposition, ald precursor chemistry, ald conformality, ald high k deposition, thermal plasma ald, ald
Atomic Layer Deposition is the vapor-phase thin film synthesis technique based on sequential, self-limiting gas-surface chemical reactions that achieves digital monolayer…
sram six transistor step 14 mismatch margining statistical design, sram mismatch statistical design margin
Address Variation and Mismatch in the Cross-Coupled Pair at Scale 14. Address Variation and Mismatch in the Cross-Coupled Pair at Scale Design teams respond to the mismatch…
value alignment, rlhf, rlaif, constitutional ai, scalable oversight, model safety
AI alignment is the effort to make AI-system behavior reliably reflect intended goals, constraints, and human values under realistic deployment conditions. Capability alone does…
AI chip fabrication, AI chip wafer manufacturing, wafer manufacturing, wafer fabrication, semiconductor manufacturing, fab process, yield modeling, advanced node manufacturing, foundry manufacturing
AI Chip Manufacturing: Advanced Node Wafer Fabrication, Metrology, and Yield Compounding AI chip manufacturing (and advanced wafer manufacturing) is the sequence of over 1,000…
subtractive interconnect process, aluminum vs copper interconnect, chlorine plasma etch aluminum, metal wiring fabrication, aluminum etch profile
Aluminum metal etch is the process step that patterns aluminum wiring into the precise interconnect shapes a chip design calls for, and it represents an older interconnect…
An alignment mark is a small reference fiducial pattern etched onto a wafer during an early process step, used by a lithography scanner to precisely position each subsequent…
Atomic layer deposition, or ALD, is a thin-film deposition technique that builds up material one atomic layer at a time through a sequence of self-limiting chemical reactions…